qt60320c Quantum Research Group, qt60320c Datasheet - Page 8

• Manufacturer Part Number: qt60320c
• Description: 32-key Qmatrix? Charge-transfer Ic
• Manufacturer: Quantum Research Group

The first two sequential bytes in this
array hold the settings data for button
X1/Y1, the next two bytes hold the data
for button X2/Y1 and so on. The gain is
held in the first byte (at the lower
address) and the threshold in the
second byte.
The button memory addresses are
calculated as follows for a given key:
Example: A key located at X4, Y3 would have its base
address at:
The first byte, at address 138 decimal is the gain, while
address 139 has the threshold for X4/Y3. The address must
be sent as a binary number (packed into 8 bits, i.e. 0x8a and
0x8b in this example), NOT as the ASCII string ‘1 3 8’.
The QT60320 reports back with a single binary byte
containing the data requested.
3.2.7 EEPROM R
It is possible to use part of the QT60320's internal eeprom as
'user storage'. This feature allows the elimination of a
separate eeprom associated with a host MCU, reducing
system cost. The QT60320 has 86 bytes of spare eeprom
available to the user for any function whatsoever. The
eeprom can be read and written using the same /eA and
/EAv commands used to examine and write key settings.
The first byte of eeprom is located at address 170 (decimal)
and can be read via the command string /eA where 'A' is the
binary byte 170 (0xaa). The highest location is at 255 (0xff).
3.2.8 '/EAv' C
(Hex codes 0x2F 0x45 A v) Allows the gain and threshold
settings for a button to be written. 'A' is a single binary byte
specifying the address and 'v' is a single binary byte value of
the data to be written.
The addresses are calculated in an identical manner to those
for the /eA command above.
Note that a change in the gain value of even one key will
cause the E6S3 to recalibrate all keys.
3.2.9 EEPROM W
See 3.2.7 for information on reading eeprom data.
The /EAv command can be used to write a byte to any of the
86 available internal eeprom locations. Like the /eA
command, byte 'A' is the address of the byte from 0xaa to
0xff. The byte 'v' should contain the 8-bit binary data to be
written to the address 'A'.
The first byte of eeprom is located at address 170 (decimal)
and can be written via the command string /EA where 'A' is
the binary byte 170 (0xaa). The highest location is at 255
(0xff).
LQ
Multiply (X-1) times 2 to get M
So, if the key is on X6, M = (6-1)*2
= 10 (decimal).
Multiply (Y-1) times 16 to get N
So, if the key is on Y3, N = (3-1)*16 = 32 (decimal).
Add M + N + 100 to get the first of the two memory
addresses for the key.
(4-1)*2 + (3-1)*16 + 100 = 32 + 6 + 100 = 138 (decimal)
OMMAND
EAD
RITE
A
- S
A
CCESS VIA
CCESS VIA
ETTINGS
W
/eA
/EA
RITE
V
BYTE #
1
2
3
4
BIT #
Table 3-3 'e' Command error code responses
X8/Y1
X8/Y2
X8/Y3
X8/Y4
7
8
3.2.10 'Ov' C
(Hex codes 0x4F v) Writes the value ‘v’, an 8-bit binary byte,
to the QT60320’s 8 output port pins O1…O8.
This feature can be used to drive LED’s via external buffers,
a self-oscillating acoustic sounder, or other peripheral device.
It can even be used in conjunction with the ‘I’ command
(below) to scan a set of external electromechanical keys (up
to 32 switches, e.g. in an 8x4 matrix) near the panel.
3.2.11 'I' C
(Hex code 0x49) Causes the QT60320 to return a binary
byte from the port pins I1…I4. The value is returned in the
lower nibble (bits 0,1,2,3) of the return byte. The high 4 bits
are held at zero.
4 - CIRCUIT GUIDELINES
4.1 POWER SUPPLY, PCB LAYOUT
The power supply should be 5.0 volts +/- 10%. This can be
provided by a common 78L05 3-terminal regulator. LDO type
regulators are usually fine but can suffer from poor transient
load response; this will cause erratic key behavior.
If the power supply is shared with another electronic system,
care should be taken to assure that the supply is free of
digital spikes, sags, and surges which can adversely affect
the circuit. The QT60320 will track slow changes in Vcc, but it
can be adversely affected by rapid voltage steps and impulse
noise on the supply rail.
4.2 SAMPLE CAPACITOR
Charge sampler Cs should be a PPS film or NPO ceramic
type for best stability. Acceptable Cs values range from 1nF
to 50nF. Lower values will increase circuit gain and hence
key sensitivity; lower values also act to reduce the required
burst length for a given desired sensitivity at the expense of
reduced inherent signal averaging.
4.3 C
The two Cz capacitors should have a value of 4% to 6% of
the total value of Cs + Cz1 + Cz2. The objective is to allow
the creation of a negative voltage step at Cs of about 0.25
volts with each Cz cap switched.
In cases where the matrix is composed entirely of small keys,
the Cz caps may not actually fire, or perhaps only one of
them may fire. However, the device's error detection logic
requires the presence of these two capacitors in order to
function correctly.
If Cs = 15nF (a common value for the circuit), then each Cz
should be 820pF. The Cz capacitors should be of type NPO
or C0G ceramic, or PPS film.
X7/Y1
X7/Y2
X7/Y3
X7/Y4
6
Z
CAPACITORS
X6/Y1
X6/Y2
X6/Y3
X6/Y4
OMMAND
5
OMMAND
X5/Y1
X5/Y2
X5/Y3
X5/Y4
- U
4
- U
SER
SER
X4/Y1
X4/Y2
X4/Y3
X4/Y4
P
3
ORT
P
ORT
QT60320C R1.08/01.03
R
EAD
X3/Y1
X3/Y2
X3/Y3
X3/Y4
W
2
RITE
X2/Y1
X2/Y2
X2/Y3
X2/Y4
1
X1/Y1
X1/Y2
X1/Y3
X1/Y4
0