z86228 ZiLOG Semiconductor, z86228 Datasheet - Page 4

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z86228

Manufacturer Part Number
z86228
Description
Line Closed Caption Controller L21c
Manufacturer
ZiLOG Semiconductor
Datasheet

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DC CHARACTERISTICS
T
Notes:
[1] Pin 13 (HLF)
[2] Pin 17 (CT/SDA) is Open-Drain.
[3] V
AC AND TIMING CHARACTERISTICS*
(Reference Line 21 AC/DC Timing)
Composite Video Input
Horizontal Signal Input (preferably H Flyback)
Line 21
Input Signal-to-Random Noise Performance
Internal Sync Circuits
The internal sync circuits will lock to all 525 line signals having a vertical sync pulse that meets the following conditions:
Timing Signals
4
*All values are nominal and not fully characterized.
A
Sym
V
V
V
V
I
I
IL
CC
= 0 C to +70 C; V
IL
IH
OL
OH
DD
Digital + V
1
Amplitude:
Polarity:
Bandwidth
Amplitude:
Polarity:
Frequency:
Code Level:
Clock Run-in Start
Unit will function down to a 25 dB ratio (CCIR weighted) with one error per row or better at that level.
Dot Clock:
Dot Period:
Character Cell Width:
Width of Row (Box):
Width of Row (Char):
Input Parameters (at 1.0 V p-p)
It is at least 2.5H long.
It starts at the proper 2H boundary for its field.
If equalizing pulse serrations are present they must be less than 0.125H in width.
DD
Parameter
Input Voltage Low
Input Voltage High
Output Voltage Low
Output Voltage High
Input Leakage
Supply Current
Analog combined.
1.0 V p-p, 3 dB
Sync tips negative
600 kHz
CMOS level signal, Low
Any
15,734.263 Hz,
CC
2
:
= +4.75V to +5.25V
50 IRE
10.5 s, 0.5 s
768 x FH = 12.0839 MHz
82.75 nsec
1.324 sec
45.018 sec
42.370 sec
10 IRE
3%
P R E L I M I N A R Y
Min
0
0.7V
V
–.0
CC
0.2V
–0.4
CC
CC
, High
Max
0.2V
V
0.4
1
3.0
25
0.7V
CC
CC
CC
Units
V
V
V
V
V
mA
A
Conditions
I
I
I
0V, V
[3]
OL
OL
OH
= 1.00 mA
= 50 A [1]
= 0.75 mA [2]
CC
CPS DC-4243-00
Z86228

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