tle8262-2e Infineon Technologies Corporation, tle8262-2e Datasheet - Page 40
tle8262-2e
Manufacturer Part Number
tle8262-2e
Description
Universal System Basis Chip Hermes
Manufacturer
Infineon Technologies Corporation
Datasheet
1.TLE8262-2E.pdf
(94 pages)
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9
9.1
Figure 16
The internal voltage regulator (
WK input pin is a bi-level sensitive input. This means that both transitions, HIGH to LOW and LOW to HIGH, result
in a wake-up. The filtering time is
case of reverse polarity, no special protection must be set if the absolute maximum rating is respected. When the
SBC is below the minimum
ignored.
The state of the WK pin (low or high) can always be read in Normal Mode, Stop Mode and SW Flash Mode at the
bit WK State. When setting the bit “WK PIN on/off” to 1, the device wakes up from Sleep Mode with a high to low
or low to high transition. From Fail-Safe Mode the device will always go to Restart Mode with a high to low or low
to high transition. If the bit “WK PIN on/off” is set to 1 in Normal, Stop or SBC SW Flash Mode the interrupt bits
“WK 0 WK pin” and/or “WK 1 WK pin” are set in case of a change on the WK pin and an interrupt is generated if
not masked. With the bits “WK 0 WK pin” and “WK 1 WK pin” the interrupt for low to high transition and high to low
transition can be masked separately.
9.2
Figure 17
parasitic wake-up due to EMC disturbances. Specifically, the voltage transition on pin WK must be higher than the
V
Data Sheet
WK,TH
and longer than
shows typical wake-up timing and parasitic filtering. The filtering time is
WK Pin
Block Description
Functional Block Diagram
Wake-Up Timing
t
WK,f
to be understood as a wake-up signal.
V
UVOFF
V
I
WK
Internal supply
cc1µC
t
WK, f.
, (SBC OFF Mode) the pin WK is at high impedance; a wake event will be
) and the entire SBC can wake up by changing the wake input voltage. The
The wake-up capability can be enabled or disabled via SPI command. In
I
PD_MON
I
PU_MON
40
machine
State
Wake.vsd
t
WK, f.
. This is used to avoid a
Rev. 1.0, 2009-05-26
TLE8262-2E
WK Pin
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