el9112 Intersil Corporation, el9112 Datasheet
el9112
Available stocks
Related parts for el9112
el9112 Summary of contents
Page 1
... CAT-5 cable by the EL4543. (Refer to the EL4543 datasheet for details.) The EL9111 and EL9112 are available QFN package and are specified for operation over the full -40°C to +85°C temperature range. ...
Page 2
... EL9112ILZ-T7 (Note) 9112ILZ EL9112ILZ-T13 (Note) 9112ILZ NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 ...
Page 3
... V(V ) Output Voltage Swing OUT I(V ) Output Drive Current OUT R Output Resistance of CM VCM_R/G/B (EL9112 only) Gain Gain 3 EL9111, EL9112 Thermal Information = +25°C) Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Die Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C - -0. +0.5V Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below ...
Page 4
... Red positive differential input 17 VINM_R Red negative differential input 18 VINP_G Green positive differential input 19 VINM_G Green negative differential input 20 VINP_B Blue positive differential input 4 EL9111, EL9112 + = +5V -5V +25°C, exposed die plate = -5V, unless otherwise specified CONDITIONS 0.39 ...
Page 5
... V =0V CTRL 3 R =150Ω LOAD 10M FREQUENCY (Hz) FIGURE 1. FREQUENCY RESPONSE OF ALL CHANNELS FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS V 5 EL9111, EL9112 EL9111IL EL9112IL PIN FUNCTION PIN NAME VINM_B VSP VCM_R VCM_G and V logic outputs VCM_B OUT OUT X2 ENABLE 0V 100M 200M FIGURE 2 ...
Page 6
... Typical Performance Curves FIGURE 5. GAIN vs FREQUENCY FOR VARIOUS V CABLE LENGTHS FIGURE 7. GROUP DELAY vs FREQUENCY FOR VARIOUS V CTRL FIGURE 9. OFFSET EL9111, EL9112 (Continued) AND CTRL CTRL FIGURE 6. CHANNEL MISMATCH FIGURE 8. OUTPUT NOISE FIGURE 10. DC GAIN vs V GAIN FN7450.4 May 9, 2007 ...
Page 7
... V = =0V CTRL V =0V GAIN -20 (ALL CHANNELS) INPUTS ON GND -40 -60 -80 -100 10 100 1K 10K 100K FREQUENCY (Hz) FIGURE 13. (+)PSRR vs FREQUENCY FIGURE 15. BLUE CROSSTALK 7 EL9111, EL9112 (Continued) 100M 1M 10M 100M 4 V =0.35V GAIN (ALL CHANNELS) V =0V 2 CTRL R =150Ω LOAD X =HIGH 100K ...
Page 8
... Typical Performance Curves FIGURE 17. GREEN CROSSTALK FIGURE 19. RED CROSSTALK FIGURE 21. RISE TIME AND FALL TIME 8 EL9111, EL9112 (Continued) FIGURE 22. PULSE RESPONSE FOR VARIOUS CABLE FIGURE 18. GREEN CROSSTALK FIGURE 20. RED CROSSTALK LENGTHS FN7450.4 May 9, 2007 ...
Page 9
... Typical Performance Curves FIGURE 23. TOTAL HARMONIC DISTORTION FIGURE 25. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 9 EL9111, EL9112 (Continued) 1.2 0.8 0.6 0.4 0.2 FIGURE 24. PACKAGE POWER DISSIPATION vs AMBIENT JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD - QFN EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 4.5 4 3.378W 3.5 3 2.5 2 1 ...
Page 10
... Applications Information Logic Control The EL9112 has two logical input pins, Chip Enable (ENABLE) and Switch Gain (X2). The logic circuits all have a nominal threshold of 1.1V above the potential of the logic reference pin (VREF). In most applications it is expected that this chip will run from a +5V, 0V, -5V supply system with logic being run between 0V and +5V ...
Page 11
... Low High NOTE: Level ‘Mid’ is halfway between ‘High’ and ‘Low’ 11 EL9111, EL9112 Sync Ref The Sync Ref pin is the reference level for the logic low of the sync outputs. It can be tied -5V, but for typical operation, the Sync Ref pin would tie to 0V. The Sync output ...
Page 12
... Power Dissipation The EL9111 and EL9112 are designed to operate with ±5V supply voltages. The supply currents are tested in production and guaranteed to be less than 39mA per channel. Operating at ±5V power supply, the total power dissipation in Equation 1 is: × × × ...
Page 13
... Package Outline Drawing L28.4x5A 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 10/06 4.00 PIN 1 INDEX AREA TOP VIEW PACKAGE BOUNDARY (2.65) (3.20) TYPICAL RECOMMENDED LAND PATTERN 13 EL9111, EL9112 A 0. 0.10 2X 0.50 MAX. 1.00 (0.40) 0.00-0.05 (28X 0.25) (0.50) (28X 0.60) NOTES: 1. Controlling dimensions are in mm. Dimensions for reference only. 2. Unless otherwise specified, tolerance : Decimal ±0.05 3 ...