lmh6522sqe National Semiconductor Corporation, lmh6522sqe Datasheet - Page 23

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lmh6522sqe

Manufacturer Part Number
lmh6522sqe
Description
High Performance Quad Dvga
Manufacturer
National Semiconductor Corporation
Datasheet
Read Timing
Data Output on SDO Pin
R/Wb
Reserved Not used. Must be set to 0.
ADDR:
DATA
Parameter
t
t
t
t
t
CSH
CSS
OZD
ODZ
OD
Read / Write bit. A value of 1 indicates a read
operation, while a value of 0 indicates a write
operation.
Address of register to be read or written.
In a write operation the value of this field will be
written to the addressed register when the chip
select pin is deasserted. In a read operation this
field is ignored.
Description
Chip select hold time
Chip select setup time
Initial output data delay
High impedance delay
Output data delay
FIGURE 14. Write Timing
FIGURE 13. Read Timing
Data Written to SDI Pin
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