adm1069ast-reel Analog Devices, Inc., adm1069ast-reel Datasheet - Page 31

• Manufacturer Part Number: adm1069ast-reel
• Description: Super Sequencer With Margining Control
• Manufacturer: Analog Devices, Inc.

In the ADM1069, the write byte/word protocol is used for three
purposes:
•
•
•
Block Write
In a block write operation, the master device writes a block of
data to a slave device. The start address for a block write must
have been set previously. In the ADM1069, a send byte opera-
tion sets a RAM address, and a write byte/word operation sets
an EEPROM address, as follows:
1.
2.
3.
4.
S
1
To write a single byte of data to RAM. In this case, the
command byte is the RAM address from 0x00 to 0xDF and
the only data byte is the actual data, as shown in Figure 40.
To set up a 2-byte EEPROM address for a subsequent read,
write, block read, block write, or page erase. In this case,
the command byte is the high byte of the EEPROM address
from 0xF8 to 0xFB. The only data byte is the low byte of
the EEPROM address, as shown in Figure 41.
Because a page consists of 32 bytes, only the 3 MSBs of the
address low byte are important for page erasure. The lower
five bits of the EEPROM address low byte specify the
addresses within a page and are ignored during an erase
operation.
To write a single byte of data to EEPROM. In this case, the
command byte is the high byte of the EEPROM address
from 0xF8 to 0xFB. The first data byte is the low byte of the
EEPROM address, and the second data byte is the actual
data, as shown in Figure 42.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by
the write bit (low).
The addressed slave device asserts ACK on SDA.
The master sends a command code that tells the slave
device to expect a block write. The ADM1069 command
code for a block write is 0xFC (1111 1100).
ADDRESS
SLAVE
S
1
ADDRESS
2
SLAVE
S
1
ADDRESS
2
SLAVE
W A
Figure 42. Single Byte Write to EEPROM
Figure 41. Setting an EEPROM Address
2
Figure 40. Single Byte Write to RAM
3
W A
(0xF8 TO 0xFB)
3
HIGH BYTE
W A
ADDRESS
EEPROM
(0xF8 TO 0xFB)
3
HIGH BYTE
ADDRESS
4
EEPROM
(0x00 TO 0xDF)
ADDRESS
4
RAM
4
5
A
(0x00 TO 0xFF)
A
5
LOW BYTE
ADDRESS
EEPROM
(0x00 TO 0xFF)
A
5
6
LOW BYTE
ADDRESS
EEPROM
DATA
6
6
A
7
A
7
DATA
P
8
8
A
7
8
P
A
9
10
P
Rev. A | Page 31 of 36
5.
6.
7.
8.
9.
10. The master asserts a stop condition on SDA to end the
Unlike some EEPROM devices that limit block writes to within
a page boundary, there is no limitation on the start address
when performing a block write to EEPROM, except when
•
•
Note that the ADM1069 features a clock extend function for
writes to EEPROM. Programming an EEPROM byte takes
approximately 250 μs, which limits the SMBus clock for
repeated or block write operations. The ADM1069 pulls SCL
low and extends the clock pulse when it cannot accept any
more data.
READ OPERATIONS
The ADM1069 uses the following SMBus read protocols.
Receive Byte
In a receive byte operation, the master device receives a single
byte from a slave device, as follows:
1.
2.
3.
4.
5.
6.
S
1
ADDRESS
SLAVE
The slave asserts ACK on SDA.
The master sends a data byte that tells the slave device how
many data bytes are being sent. The SMBus specification
allows a maximum of 32 data bytes in a block write.
The slave asserts ACK on SDA.
The master sends N data bytes.
The slave asserts ACK on SDA after each data byte.
transaction.
There must be at least N locations from the start address to
the highest EEPROM address (0xFBFF), to avoid writing to
invalid addresses.
The addresses cross a page boundary. In this case, both
pages must be erased before programming.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The addressed slave device asserts ACK on SDA.
The master receives a data byte.
The master asserts no acknowledge on SDA.
The master asserts a stop condition on SDA, and the
transaction ends.
2
W A
3
Figure 43. Block Write to EEPROM or RAM
COMMAND 0xFC
(BLOCK WRITE)
4
A
5
COUNT
BYTE
6
A
7
DATA
8
1
9
A
DATA
2
ADM1069
A
DATA
N
A P
10