sab-c167cs-l16m3v Infineon Technologies Corporation, sab-c167cs-l16m3v Datasheet - Page 59

• Manufacturer Part Number: sab-c167cs-l16m3v
• Description: 16-bit Single-chip Microcontroller
• Manufacturer: Infineon Technologies Corporation

AC Characteristics
Definition of Internal Timing
The internal operation of the C167CS-3V is controlled by the internal CPU clock
Both edges of the CPU clock can trigger internal (e.g. pipeline) or external (e.g. bus
cycles) operations.
The specification of the external timing (AC Characteristics) therefore depends on the
time between two consecutive edges of the CPU clock, called “TCL” (see
Figure 11
The CPU clock signal
different mechanisms. The duration of TCLs and their variation (and also the derived
external timing) depends on the used mechanism to generate
be regarded when calculating the timings for the C167CS-3V.
Note: The example for PLL operation shown in
The used mechanism to generate the basic CPU clock is selected by bitfield CLKCFG
in register RP0H.7-5.
Upon a long hardware reset register RP0H is loaded with the logic levels present on the
upper half of PORT0 (P0H), i.e. bitfield CLKCFG represents the logic levels on pins
Data Sheet
Phase Locked Loop Operation
f
f
Direct Clock Drive
f
f
Prescaler Operation
f
f
OSC
CPU
OSC
CPU
OSC
CPU
Generation Mechanisms for the CPU Clock
f
CPU
can be generated from the oscillator clock signal
55
Figure 11
refers to a PLL factor of 4.
TCL
f
CPU
TCL
. This influence must
C167CS-L16M3V
TCL
TCL
TCL
TCL
MCT04338
Figure
Low Power
V1.0, 2001-10
f
OSC
11).
f
CPU
via
.