at89lp216-20xi ATMEL Corporation, at89lp216-20xi Datasheet - Page 16

• Manufacturer Part Number: at89lp216-20xi
• Description: At89lp216 8-bit Microcontroller With 2k Bytes Flash
• Manufacturer: ATMEL Corporation

When terminating Power-down by an interrupt, two different wake-up modes are available.
When PWDEX in PCON is zero, the wake-up period is internally timed as shown in
Figure
11-1.
At the falling edge on the interrupt pin, Power-down is exited, the oscillator is restarted, and an
internal timer begins counting. The internal clock will not be allowed to propagate to the CPU
until after the timer has timed out. After the time-out period the interrupt service routine will
begin. The time-out period is controlled by the Start-up Timer Fuses (see
Table 10-1 on page
14). The interrupt pin need not remain low for the entire time-out period.
Figure 11-1. Interrupt Recovery from Power-down (PWDEX = 0)
PWD
XTAL1
t SUT
INT1
Internal
Clock
When PWDEX = “1”, the wake-up period is controlled externally by the interrupt. Again, at the
falling edge on the interrupt pin, power-down is exited and the oscillator is restarted. However,
the internal clock will not propagate until the rising edge of the interrupt pin as shown in
Figure
11-2. The interrupt pin should be held low long enough for the selected clock source to stabilize.
After the rising edge on the pin the interrupt service routine will be executed.
Figure 11-2. Interrupt Recovery from Power-down (PWDEX = 1)
PWD
XTAL1
INT1
Internal
Clock
11.2.2
Reset Recovery from Power-down
The wake-up from Power-down through an external reset is similar to the interrupt with
PWDEX = “0”. At the falling edge of RST, Power-down is exited, the oscillator is restarted, and
an internal timer begins counting as shown in
Figure
11-3. The internal clock will not be allowed
to propagate to the CPU until after the timer has timed out. The time-out period is controlled by
the Start-up Timer Fuses. (See
Table 10-1 on page
14). If RST returns high before the time-out,
a two clock cycle internal reset is generated when the internal clock restarts. Otherwise, the
device will remain in reset until RST is brought high.
AT89LP216
16
3621B–MICRO–11/07