adm8515 Infineon Technologies Corporation, adm8515 Datasheet - Page 15

• Manufacturer Part Number: adm8515
• Description: Usb2.0 To 10/100 Mbit/s Ethernet Lan Controller Adm8515/x
• Manufacturer: Infineon Technologies Corporation

2.2.2
Note: Program ADM8515/X as MAC-only mode, set register 81
Table 6
Pin or Ball
No.
53
52
72
73
64
71
69
68
67
65
63
62
Data Sheet
MII Interface
MII Interface
Name
COL
CRS
MDC
MDIO
RXCLK
RXD3
RXD2
RXD1
RXD0
RXDV
RXER
TXCLK
Pin
Type
I
I
O
I/O
I
I
I
I
I
Buffer
Type
Function
Collision Detected
This signal is asserted high asynchronously by the external
physical unit upon detection of a collision on the medium. It
will remain asserted as long as the collision condition
persists.
Carrier Sense
This signal is asserted high asynchronously by the external
physical unit upon detection of a non-idle medium.
Management Data Clock
Clock signal with a maximum rate of 2.5 MHz used to
transfer management data for the external PMD on the
MDIO pin.
Management Data I/O
Bi-directional signal used to transfer management
information for the external PMD. Requires a 1.5 kΩ pull-up
resistor if external PHY is used.
Receive Clock
A continuous clock that is recovered from the incoming
data. During 100 Mbit/s operation, RXCLK is 25 MHz.
During 10 Mbit/s, this is 2.5 MHz.
Receive Data
This is a group of 4 data signals aligned on nibble boundary
which are driven synchronous to the RXCLK by the external
physical unit. RXD[3] is the most significant bit and RXD[0]
is the least significant bit.
Receive Data Valid
This indicates that the external physical unit is presenting
recovered and decoded nibbles on the RXD[3:0] and that
RXCLK is synchronous to the recovered data
Receive Error
This signal is asserted high synchronously by the external
physical unit whenever it detects a media error and RXDV
is asserted. If not used, it should be grounded, e.g. isolate
internal PHY and use external PHY.
Transmit Clock
A continuous clock that gets its source by the physical
layer. During 100 Mbit/s operation, this clock is 25 MHz.
During 10 Mbit/s operation, this clock is 2.5 MHz.
15
H
[4:2] = 001
B
and register 01
Interface Description
Rev. 1.21, 2005-11-08
H
bit 2 = 0
ADM8515/X