adm823myrj-r7 Analog Devices, Inc., adm823myrj-r7 Datasheet - Page 10

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adm823myrj-r7

Manufacturer Part Number
adm823myrj-r7
Description
Supervisory Circuit With Watchdog And Manual Reset In 5-lead Sc70 And Sot-23
Manufacturer
Analog Devices, Inc.
Datasheet
ADM823/ADM824/ADM825
APPLICATION INFORMATION
WATCHDOG INPUT CURRENT
In order to minimize watchdog input current (and minimize
overall power consumption), leave WDI low for the majority of
the watchdog timeout period. When driven high, WDI can
draw as much as 160 μA. Pulsing WDI low-high-low at a low
duty cycle reduces the effect of the large input current. When
WDI is unconnected, a window comparator disconnects the
watchdog timer from the reset output circuitry so that reset is
not asserted when the watchdog timer times out.
NEGATIVE-GOING V
To avoid unnecessary resets caused by fast power supply
transients, the ADM823/ADM824/ADM825 are equipped with
glitch rejection circuitry. The typical performance characteristic
in Figure 12 plots V
nitude. The curves show combinations of transient magnitude
and duration for which a reset is not generated for 4.63 V and
2.93 V reset threshold parts. For example, with the 2.93 V
threshold, a transient that goes 100 mV below the threshold and
lasts 8 μs typically does not cause a reset, but if the transient is
any bigger in magnitude or duration, a reset is generated. An
optional 0.1 μF bypass capacitor mounted close to V
additional glitch rejection.
ENSURING RESET VALID TO V
Both active low and active high reset outputs are guaranteed to
be valid for V
resistor with push-pull configured reset outputs, valid outputs
for V
a resistor connected between RESET and ground pulls the
output low when it is unable to sink current. For the active high
case, a resistor connected between RESET and V
output high when it is unable to source current. A large
resistance such as 100 kΩ should be used so that it does not
overload the reset output when V
ADM823/
ADM824/
ADM825
CC
V
as low as 0 V are possible. For an active low reset output,
CC
CC
Figure 17. Ensuring Reset Valid to V
as low as 1 V. However, by using an external
RESET
CC
transient duration vs. the transient mag-
100kΩ
CC
TRANSIENTS
CC
ADM824/
ADM825
is above 1 V.
CC
V
CC
= 0 V
CC
= 0 V
CC
pulls the
RESET
CC
provides
100kΩ
Rev. A | Page 10 of 12
WATCHDOG SOFTWARE CONSIDERATIONS
In implementing the microprocessor watchdog strobe code,
quickly switching WDI low-high and then high-low (minimizing
WDI high time) is desirable for current consumption reasons.
However, a more effective way of using the watchdog function
can be considered.
A low-high-low WDI pulse within a given subroutine prevents
the watchdog timing out. However, if the subroutine becomes
stuck in an infinite loop, the watchdog cannot detect this because
the subroutine continues to toggle WDI. A more effective coding
scheme for detecting this error involves using a slightly longer
watchdog timeout. In the program that calls the subroutine,
WDI is set high. The subroutine sets WDI low when it is called.
If the program executes without error, WDI is toggled high and
low with every loop of the program. If the subroutine enters an
infinite loop, WDI is kept low, the watchdog times out, and the
microprocessor is reset.
SUBROUTINE
PROGRAM
MR
SET WDI
SET WDI
RETURN
START
CODE
HIGH
ADM823
LOW
Figure 19. Typical Application Circuit
Figure 18. Watchdog Flow Diagram
V
CC
RESET
WDI
RESET
I/O
MICROPROCESSOR
INFINITE LOOP:
WATCHDOG
TIMES OUT
RESET

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