adm8698arwz Analog Devices, Inc., adm8698arwz Datasheet - Page 4

• Manufacturer Part Number: adm8698arwz
• Description: ?p Supervisory Circuit With 4.65v Threshold Voltage, Low Supply Current And Active Low Reset Output. Upgrade For Adm698
• Manufacturer: Analog Devices, Inc.

ADM8698/ADM8699
CIRCUIT INFORMATION
Power Fail RESET
A precision voltage detector monitors V
RESET output to hold the microprocessor’s Reset line low when
V
reset voltage threshold is set to accommodate a 5% variation on
V
glitches on V
On power-up, an internal monostable holds RESET low for
140 ms after V
power supply to stabilize on power-up and also prevents repeated
toggling of RESET even if the 5 V power drops out and recovers
with each power line cycle. In order to prevent mistriggering
due to transient voltage spikes, it is recommended that a 0.1 F
capacitor be connected at the V
The RESET output is guaranteed to remain low with V
low as 1 V. This holds the microprocessor in a stable shutdown
condition as the power supply comes up.
On the 16-lead SOIC package, an active high RESET output is
also provided. This is the complement of RESET and is in-
tended for microprocessors requiring an active high signal.
CC
CC
RESET
Figure 4. Watchdog Timeout Period vs. Temperature
. The voltage detector has 40 mV hysteresis to ensure that
V
falls below the reset threshold 4.65 V (see Figure 4). The
CC
0.018 (0.46)
8-Pin Plastic DIP (N-8)
0.18 (4.57)
PIN 1
CC
CC
V
do not activate the RESET output.
2
rises above the reset threshold. This allows the
8
1
t
0.430 (10.92)
1
V
V
t
0.1 (2.54)
1
1
2
0.3 (7.62)
= RESET TIME
BSC
= RESET VOLTAGE THRESHOLD
= RESET VOLTAGE THRESHOLD +
MAX
THRESHOLD HYSTERESIS
(0.28)
0.011
5
4
V
1
(6.35)
0.035
(0.89)
0.25
0.033 (0.84)
SEATING
PLANE
0.18
(4.57)
MAX
CC
0.125
(3.18)
MIN
(7.87)
pin.
0.31
V
CC
2
and generates a
t
1
Dimensions shown in inches and (mm).
0.0098 (0.25)
0.0040 (0.10)
0.2440 (6.20)
0.2284 (5.80)
OUTLINE DIMENSIONS
0.0098 (0.25)
0.0075 (0.19)
CC,
SEATING
PLANE
8-Pin SOIC (R-8)
as
V
1
0.0500
(1.27)
0.1968 (5.00)
0.1890 (4.80)
8
1
BSC
PIN 1
–4–
8
0
0.0196 (0.50)
0.0099 (0.25)
0.0500 (1.27)
0.0160 (0.41)
Watchdog Timer (ADM8699 Only)
The watchdog timer input (WDI) monitors an I/O line from the
onds to verify correct software execution. Failure to toggle the
line indicates that the P system is not correctly executing its
program and may be tied up in an endless loop. If this happens,
a reset pulse is generated to initialize the processor.
The WDI input is a three level input and will recognize a low-
to-high or high-to-low transition on its input. The watchdog
timer is reset by each WDI transition and then begins its timeout
period. If the WDI pin remains either high or low, reset pulses
will be issued every 1.6 seconds typically. If the watchdog timer
is not needed, the WDI input should be left floating.
The Watchdog Output (WDO) (SOIC package Only) provides
watchdog status information. It is driven low if WDI is not
toggled within the watchdog timeout period. It goes high at the
next WDI transition. It is also set high when V
reset threshold.
0.0192 (0.49)
0.0138 (0.35)
Figure 5. Watchdog Timeout Period and Reset Active Time
P system. The P must toggle this input once every 1.6 sec-
0.102 (2.59)
0.094 (2.39)
5
4
0.1574 (4.00)
0.1497 (3.80)
x 45
RESET
WDO
WDI
t
1
t
t
1 = RESET TIME
2 = WATCHDOG TIME OUT PERIOD
0.013
(0.32)
(0.75)
0.299
(7.60)
0.030
0.012
(0.3)
16-Lead SOIC (R-16)
t
2
16
1
0.05 (1.27)
0.413 (10.50)
REF
t
1
0.019 (0.49)
CC
t
2
falls below the
(1.07)
0.042
9
8
(10.65)
0.104
(2.65)
0.419
t
1
REV. 0