peb20525 Infineon Technologies Corporation, peb20525 Datasheet - Page 240
peb20525
Manufacturer Part Number
peb20525
Description
2 Channel Serial Optimized Communication Controller For Hdlc/ppp
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20525.pdf
(252 pages)
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Table 26
No. Parameter
Transmit
data rates
100 Clock
101 TxD to TxCLK delay (NRZ, NRZI encoding)
102 TxD to TxCLK delay (FM0, FM1, Manchester
103 TxD to TxCLK(out) delay (output function enabled) 10
104 CxD to TxCLK setup time
105 CxD to TxCLK hold time
106 RTS to TxCLK delay (not bus configuration mode)
Data Sheet
period
encoding)
CTS to TxCLK setup time
CTS to TxCLK hold time
RTS to TxCLK delay (bus configuration mode)
Transmit Cycle Timing
externally clocked
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
externally clocked
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
240
min.
0
0
0
80
480
80
5
5
5
5
Electrical Characteristics
Limit Values
max.
12.5
2
12.5
¥
¥
¥
25
25
25
20
20
PEB 20525
PEF 20525
2000-09-14
Unit
ns
ns
Mbit/s
Mbit/s
Mbit/s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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