lan9500 Standard Microsystems Corp., lan9500 Datasheet - Page 29
lan9500
Manufacturer Part Number
lan9500
Description
Lan9500/lan9500i Hi-speed Usb 2.0 To 10/100 Ethernet Controller
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9500.pdf
(34 pages)
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Hi-Speed USB 2.0 to 10/100 Ethernet Controller
Datasheet
SMSC LAN9500/LAN9500i
3.5.4
SYMBOL
t
EEDI (VERIFY)
t
t
t
t
t
t
cshckh
t
t
t
ckhdis
dvckh
dsckh
dhckh
cshdv
cklcsl
ckldis
ckcyc
dhcsl
t
t
t
ckh
ckl
csl
EECLK
EEPROM Timing
The following specifies the EEPROM timing requirements for LAN9500/LAN9500i:
EECS
EEDO
EEDI
EECLK Cycle time
EECLK High time
EECLK Low time
EECS high before rising edge of EECLK
EECLK falling edge to EECS low
EEDO valid before rising edge of EECLK
EEDO disable after rising edge EECLK
EEDI setup to rising edge of EECLK
EEDI hold after rising edge of EECLK
EECLK low to data disable (OUTPUT)
EEDIO valid after EECS high (VERIFY)
EEDIO hold after EECS low (VERIFY)
EECS low
DESCRIPTION
t
cshckh
Table 3.11 EEPROM Timing Values
t
cshdv
Figure 3.4 EEPROM Timing
t
ckh
t
t
dsckh
ckcyc
DATASHEET
t
dvckh
t
ckl
29
t
ckhdis
t
dhckh
1070
1070
1110
MIN
550
550
550
550
580
30
90
0
0
t
ckldis
t
TYP
cklcsl
t
dhcsl
t
csl
Revision 1.4 (07-07-08)
MAX
1130
570
570
600
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns