lan9215i Standard Microsystems Corp., lan9215i Datasheet - Page 13
lan9215i
Manufacturer Part Number
lan9215i
Description
Lan9215i 16-bit Non-pci 10/100 Ethernet Controller With Hp Auto-mdix And Industrial Temperature Support
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9215I.pdf
(138 pages)
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16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SMSC LAN9215i
1.12
1.13
The host bus interface provides a FIFO interface for the transmit and receive data paths, as well as
an interface for the LAN9215i Control and Status Registers (CSR’s).
The host bus interface is the primary bus for connection to the embedded host system. This interface
models an asynchronous SRAM. TX FIFO, RX FIFO, and CSR’s are accessed through this interface.
Programmed I/O transactions are supported.
The LAN9215i host bus interface supports 16-bit bus transfers. Internally, all data paths are 32-bits
wide. The LAN9215i can be interfaced to either Big-Endian or Little-Endian processors.
The LAN9215i also supports the ability to interface to an external PHY device. This interface is
compatible with all IEEE 802.3 MII compliant physical layer devices. For additional information on the
MII interface and associated signals, please refer to
Switching," on page 43
Host Bus Interface (SRAM Interface)
External MII Interface
for more information.
DATASHEET
13
Section 3.11, "MII Interface - External MII
Revision 2.3 (08-06-08)
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