lan9115 Standard Microsystems Corp., lan9115 Datasheet - Page 17

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lan9115

Manufacturer Part Number
lan9115
Description
Lan9115 Highly Efficient Single-chip 10/100 Non-pci Ethernet Controller
Manufacturer
Standard Microsystems Corp.
Datasheet

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Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9115
PIN
NO.
71,73,
84,90,
95
70
91
6
5
NAME
Wakeup Indicator
Reserved
Crystal 1
Crystal 2
Reset
SYMBOL
Reserved
nRESET
Table 2.5 System and Power Signals
XTAL1
XTAL2
PME
DATASHEET
BUFFER
TYPE
O8/OD8
(PU)
Oclk
lclk
17
IS
NUM
PINS
1
1
1
1
5
DESCRIPTION
External 25MHz Crystal Input.
Can also be connected to single-
ended TTL oscillator. If this method is
implemented, XTAL2 should be left
unconnected.
External 25MHz Crystal output.
Active-low reset input. Resets all logic
and registers within the LAN9115
This signal is pulled high with a weak
internal pull-up resistor. If nRESET is
left unconnected, the LAN9115 will
rely on its internal power-on reset
circuitry
Note:
When programmed to do so, is
asserted when the LAN9115 detects
a wake event and is requesting the
system to wake up from the
associated sleep state. The polarity
and buffer type of this signal is
programmable.
Note:
No Connect
The LAN9115 must always
be read at least once after
power-up, reset, or upon
return from a power-saving
state or write operations will
not function. See
3.11, "Detailed Reset
Description," on page 42
additional information
Detection of a Power
Management Event, and
assertion of the PME signal
will not wakeup the
LAN9115. The LAN9115 will
only wake up when it
detects a host write cycle
(assertion of nCS and
nWR). Although any write to
the LAN9115, regardless of
the data written, will wake-
up the device when it is in a
power-saving mode, it is
required that the
BYTE_TEST register be
used for this purpose.
Revision 1.5 (07-11-08)
Section
for

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