lan8710 Standard Microsystems Corp., lan8710 Datasheet - Page 19

• Manufacturer Part Number: lan8710
• Description: Mii/rmii 10/100 Ethernet Transceiver With Hp Auto-mdix And Flexpwr Technology In A Small Footprint
• Manufacturer: Standard Microsystems Corp.

MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR
Datasheet
SMSC LAN8710/LAN8710i
Chapter 4 Architecture Details
4.1
4.2
4.2.1
M A C
125 M bps S erial
Functionally, the transceiver can be divided into the following sections:
The data path of the 100Base-TX is shown in
100M Transmit Data Across the MII/RMII Interface
For MII, the MAC controller drives the transmit data onto the TXD bus and asserts TXEN to indicate
valid data. The data is latched by the transceiver’s MII block on the rising edge of TXCLK. The data
is in the form of 4-bit wide 25MHz data.
For RMII, the MAC controller drives the transmit data onto the TXD bus and asserts TXEN to indicate
valid data. The data is latched by the transceiver’s RMII block on the rising edge of REF_CLK. The
data is in the form of 2-bit wide 50MHz data.
Top Level Functional Architecture
100Base-TX Transmit
100Base-TX transmit and receive
10Base-T transmit and receive
MII or RMII interface to the controller
Auto-negotiation to automatically determine the best speed and duplex possible
Management Control to read status registers and write control registers
R M II 50M hz by 2 bits
M II 25 M hz by 4 bits
E xt R ef_C LK (for R M II only)
or
(for M II only)
TX _C LK
C onverter
M LT-3
N R ZI
Figure 4.1 100Base-TX Data Path
M agnetics
®
M II/R M II
Technology in a Small Footprint
DATASHEET
N R ZI
19
C onverter
P LL
by 4 bits
25M H z
M LT -3
Figure
M LT -3
4.1. Each major block is explained below.
E ncoder
4B /5B
M LT -3
R J45
25M H z by
D river
5 bits
Tx
M LT-3
Revision 1.0 (04-15-09)
S cram bler
and P IS O
C A T-5