mc33702 Freescale Semiconductor, Inc, mc33702 Datasheet - Page 16

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mc33702

Manufacturer Part Number
mc33702
Description
3.0 A Switch-mode Power Supply With Linear Regulator
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Quantity:
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Requirements
Methods of Control
controlling the regulator output voltages, as described in the
paragraphs below. Power sequencing control is also achieved
through the intrinsic operation of the regulators. The EN1 and
EN2 pins can be used to disable the power sequencing (refer to
Table
Intrinsic Operation
is below the regulation point, the LDO external Pass FET will be
on or the Buck High-Side FET will be on at a duty cycle
controlled by the switcher. Because these devices are FETs,
current can flow in either direction, balancing the voltages via
the common supply pin. The ability to maintain the FETs on will
depend on the available gate voltage, and thus the size of the
boost regulator storage capacitor.
33702
16
V Start-Up
Max. Lead
Figure 12. Inverted Power Up/Down Sequence in +5.0 V
V = 2.0 V
1. I/O supply voltage not to exceed core voltage by more than
2. Core supply voltage not to exceed I/O voltage by more
The 33702 has several methods of monitoring and
For both the LDO and switcher, whenever the output voltage
2.0 V.
than 0.4 V.
2, page 15.
3.3 V I/O Voltage (V
5.0 V Input Supply
1.8 V Core Voltage (V
Max. Lag
V = 0.4 V
Supply System
OUT
)
LDO
Max. Lag
V = 0.4 V
)
Freescale Semiconductor, Inc.
For More Information On This Product,
33702 POWER SEQUENCING
Max. Lead
Go to: www.freescale.com
V = 2.0 V
Standard Power Sequencing
Sequencing mode, the switcher output provides the core
voltage for the microprocessor. This situation and operating
conditions are illustrated in
page 15, shows the Power Sequencing mode selection.
Inverted Power Sequencing
Sequencing mode, the linear regulator (LDO) output provides
the core voltage for the microprocessor, as illustrated in
Figure
selection.
Standard Power Sequencing Control
(LDO pin) and the switcher (V
1. LDO > V
2. LDO > V
3. LDO < V
4. LDO < V
5. LDO < V
6. LDO > V
When the power supply IC operates in the Standard Power
When the power supply IC is operating in the Inverted Power
Comparators monitor voltage differences between the LDO
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
forced off. This occurs whenever the LDO output voltage
exceeds the switcher output voltage by more than 1.8 V.
the LDO is insufficient and the LDO output voltage
exceeds the switcher output voltage by more than 1.9 V,
a 1.0
load capacitor to ground. The shunt FET is used for
switcher output shorts to ground and for power down in
case of V
than the LDO.
LDO. Normal operation resumes when the LDO output
voltage is less than 1.7 V above the switcher output
voltage.
be forced off. This occurs whenever the LDO is less than
V
V
the Sync FET is forced on. This occurs when the switcher
output voltage exceeds the LDO output by more than
300 mV.
resumes when LDO > V
OUT
OUT
12.
Table 2
sink FET. The Buck High-Side FET is forced off and
- 0.2 V.
shunt FET is turned on that discharges the LDO
OUT
OUT
OUT
OUT
OUT
OUT
IN1
, reset (4) and (5) above. Normal operation
+ 1.7 V, cancel (1) and (2) above, re-enable
+ 1.8 V, turn off LDO. The LDO can be
+ 1.9 V, shunt LDO to ground. If turning off
- 0.2 V, turn off switcher. The switcher can
- 0.3 V, turn on Sync (LS) FET and 1.0
shows the Power Sequencing mode
V
IN2
with the switcher output falling faster
Figure 10
OUT
OUT
.
pin) outputs as follows:
and
Figure
11.
Table
2,

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