mc33899vwr2 Freescale Semiconductor, Inc, mc33899vwr2 Datasheet - Page 12

• Manufacturer Part Number: mc33899vwr2
• Description: Programmable H-bridge Power Ic
• Manufacturer: Freescale Semiconductor, Inc

circuit (IC) designed to drive DC motors or bi-directional
solenoid controlled actuators, such as throttle control or
exhaust gas recirculation actuators. It is particularly well
suited for the harsh environment found in automotive power
train systems.
configurability. The selectable slew rate permits the customer
to choose the slew rate needed for performance and noise
suppression. The Serial Peripheral Interface (SPI) allows the
system microprocessor to clear the fault register, select a
VIGNP INPUT (VIGNP)
input voltage is 0 V to 26.5 V (40 V during a load dump
transient). This pin must be externally protected against
application of a reverse voltage (through an external inverted
N-channel MOSFET, diode, or switched relay).
+ 5.0 V INPUT (VCC)
circuitry and the +3.3 V internal regulator.
+ 3.3 V INPUT (VCCL)
circuitry. The internal supply cannot be used as a power
source by any other IC in the system. This output can be
overdriven by an external supply. The internal supply
requires a 0.47 µF capacitor on this output to insure proper
startup sequencing when coming out of sleep mode.
LOGIC BIAS INPUT (VDDQ)
level outputs designed to be read by the microprocessor. This
pin will apply the logic supply voltage to DO and LSCMP
making the output logic levels compliant to logic systems
from 3V to over 5V.
OUTPUTS (S1 AND S0)
Each output has two internal N-channel MOSFETs
connected a half-bridge configuration between VIGNP and
ground. Only one internal MOSFET is on at any one time for
each output. The FWD, REV, and PWM inputs control the
state of the H-Bridge. The turn on / off slew times are
determined by the selected RS resistor value and the SPI
slew time register contents (refer to
12
33899
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33899 is a programmable H-Bridge, power integrated
The key characteristic of this versatile driver is
VIGNP is the primary power input for the H-Bridge. The
+5.0 V power input is required to power the internal analog
A +3.3 V internal regulator powers the internal digital
VDDQ supplies the level shifted bias voltage for the logic
The S1 and S0 outputs drive the bi-directional DC motor.
Table
8, page 22).
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
INTRODUCTION
programmable current limit and select the slew rate. A unique
fault restart feature allows the part to be configured to
maintain limited functionality even in the presence of some
faults.
using pulse-width modulation (PWM) for speed and torque
control. A current mirror output provides an analog feedback
signal proportional to the load current. SPI diagnostic
reporting includes open circuit, short-to-battery, short-to-
ground, die temperature range and under voltage.
OUTPUT POLARITY CONTROL (FWD/REV INPUTS)
current flow in the H-Bridge by directing the PWM input to one
of the low-side MOSFETs (refer to
in the current direction is commanded via the
microprocessor, the PWM must switch from one low-side
MOSFET to the other without shoot-through current in the H-
Bridge. The gate voltage of the low-side MOSFETs must drop
below and remain below the gate threshold voltage for the
“dead time” before either of the high-side MOSFETs is
commanded on. At no time are the high-side and low-side
MOSFETs simultaneously on at the same side of the H-
Bridge. The FWD and REV inputs have 50 µA pull-downs to
ground that disable all the outputs should an open circuit
condition occur.
ENABLE INPUTS (EN1, EN2)
four of the output drivers (refer to
or EN2 is at logic [1], the 33899 is still capable of detecting
open circuit and short circuit faults on all of the outputs
interfacing with the external load(s). The EN1 and EN2 inputs
have 50
when open circuit conditions occur.
The 33899 is designed to drive a bi-directional DC motor
The FWD and REV inputs determine the direction of
Logic [0] in either of the Enables (EN1 or EN2) disables all
FWD
EN1
0
0
1
1
0
µ
A pull-downs to ground that disable the outputs
Table 5. FWD / REV Truth Table
Table 6. Enable Truth Table
REV
EN2
0
0
1
0
1
Analog Integrated Circuit Device Data
Disabled (Sleep Mode)
Table
Table
Freescale Semiconductor
Current Direction
6). While either EN1
Reverse
Forward
Status
5). When a change
Off
Off