mc33889 Freescale Semiconductor, Inc, mc33889 Datasheet - Page 50

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mc33889

Manufacturer Part Number
mc33889
Description
System Basis Chip With Low Speed Fault Tolerant Can Interface
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Table 29. Cyclic Sense Timing
LPC REGISTER
by TIM2 register)
Table 30. LPC Register
50
33889
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Description: This register controls:
- The state of HS1 in stop and sleep mode (HS1 permanently off or HS1 cyclic)
- Enable or Disable the forced wake-up function (SBC automatic wake-up after time spend in sleep or stop mode, time defined
- Enable or disable the sense of the wake-up inputs (LX) at sampling point of the cyclic sense period (LX2HS1 bit).
Reset condition
$110b
CSP2
Reset
LPC
0
0
0
0
1
1
1
1
Sample
HS1
W
R
CSP1
0
0
1
1
0
0
1
1
POR, NR2R, N2R,
STB2R, STO2R
Cyclic sense timing
LX2HS1
D3
0
CSP0
0
1
0
1
0
1
0
1
POR, NR2R, N2R,
STB2R, STO2R
Cyclic sense on time
FWU
D2
0
Cyclic sense timing [ms]
POR, NR2R, N2R,
10 µs to 20 µs
STB2R, STO2R
IDDS
Analog Integrated Circuit Device Data
D1
0
100
200
400
10
20
40
75
5
t
Freescale Semiconductor
POR, NR2R, N2R,
STB2R, STO2R
HS1AUTO
D0
0

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