mc33981bpna/r2 Freescale Semiconductor, Inc, mc33981bpna/r2 Datasheet - Page 13

• Manufacturer Part Number: mc33981bpna/r2
• Description: Single High-side Switch 4.0 M , Pwm Clock Up To 60khz
• Manufacturer: Freescale Semiconductor, Inc

depending on EN input.
SLEEP MODE
logic [0]. In this mode, OUT, the gate driver for the external
MOSFET, and all unused internal circuitry are off to minimize
current draw.
UNDERVOLTAGE
of
supply rises to
reset below
OVERTEMPERATURE FAULT
shutdown circuitry on OUT. Overtemperature detection also
protects the low-side gate driver (GLS pin). Overtemperature
detection occurs when OUT is in the ON or OFF state and
GLS is at high or low level.
OUT turning OFF until the temperature falls below T
cycle will continue indefinitely until the offending load is
removed.
over temperature on OUT.
results in OUT turning OFF and the GLS going to 0 V until the
temperature falls below T
Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 5. Operating Modes
H = High level
L = Low level
x = Don’t care
PWM_bar = Opposite of pulse-width modulation signal.
V
The 33981 has 2 operating modes: Sleep and Normal
Sleep mode is the state of the 33981 when the EN is
The 33981 incorporates undervoltage protection. In case
The 33981 incorporates over temperature detection and
For OUT, an over temperature fault condition results in
An over temperature fault on the low-side gate drive
Condition
PWR
Normal
Normal
Normal
Normal
Normal
Sleep
<
V
Figure 12, page 16
PWR
V
PWR
(UV)
V
PWR
CONF INHS
(UV)
, the OUT is switched OFF until the power
H
x
L
L
L
L
(UV)
.
+
PWM
SD
V
H
H
x
L
L
PWR
and
. This cycle will continue until the
(UVHYS)
INLS
Figure 18, page 20
H
H
H
L
L
x
PROTECTION AND DIAGNOSTIC FEATURES
. The latched fault are
FUNCTIONAL DEVICE OPERATION
PWM
OUT
H
H
x
L
L
PWM_bar
GLS
OPERATIONAL MODES
H
H
show an
L
L
x
SD
. This
FS
H
H
H
H
H
H
EN
H
H
H
H
H
L
NORMAL MODE
EN pin is logic [1]. The INHS and INLS commands will be
disabled t
charge of the bootstrap capacitor.
offending load is removed. FS pin transition to logic [1] will be
disabled typically t
bootstrap capacitor.
OVERCURRENT FAULT ON HIGH SIDE
called I
current reaches this level, OUT will stay OFF and the CSNS
pin will go to 0 V. The OUT pin is reset (and the fault is
delatched) by a logic [0] at the INHS pin for at least t
When INHS goes to 0 V, CSNS goes to 5.0 V.
When the current reaches I
t
OVERLOAD FAULT ON LOW SIDE
side overload protection does not measure the current
directly but rather its effects on the low-side MOSFET. When
OCH
The 33981 will go to the normal operating mode when the
Overtemperature faults force the TEMP pin to 0 V.
The OUT pin has an overcurrent high-detection level
In
This fault detection is active when INLS is logic [1]. Low-
Device is in Sleep mode. The OUT and low-side gate are OFF.
Normal mode. High side and low side are controlled
independently. The high side and the low side are both on.
Normal mode. High side and low side are controlled
independently. The high side and the low side are both off.
Normal mode. Half-bridge configuration. The high side is off
and the low side is on.
Normal mode. Half-bridge configuration. The high side is on
and the low side is off.
Normal mode. Cross-conduction management is activated.
Half-bridge configuration.
Figure 16, page 19
owing to internal logic circuit.
OCH
ON
for maximum device protection. If at any time the
after the EN transitions to logic [1] to enable the
ON
after to enable the charge of the
, the OUT pin is short-circuited to 0 V.
FUNCTIONAL DEVICE OPERATION
Comments
OCH
, OUT is turned OFF within
OPERATIONAL MODES
RST(diag)
33981
13
.