mc33395 Freescale Semiconductor, Inc, mc33395 Datasheet - Page 10

• Manufacturer Part Number: mc33395
• Description: Three-phase Gate Driver Ic
• Manufacturer: Freescale Semiconductor, Inc

GATE DRIVE CIRCUITS
peak currents required to turn ON and hold ON the
MOSFETs, as well as turn OFF and hold OFF the MOSFETs.
CHARGE PUMP
supply the gate drive circuit’s demands when PWMing at up
to 28 kHz. Two external charge pump capacitors and a
reservoir capacitor are required to complete the charge
pump’s circuitry.
MOSFET gate charge (Q
the source (V
during the turn-on interval (V
the following formula:
and provide for, adequate gate drive during high demand
turn-ON intervals. Use the following formula to determine
values for C
0.15 µF:
be determined:
THERMAL SHUTDOWN FUNCTION
which activates a protective shutdown function should the die
reach excessively elevated temperatures. This function
effectively limits power dissipation and thus protects the
device.
OVERVOLTAGE SHUTDOWN FUNCTION
over- voltage shutdown level, the part will automatically shut
down to protect both internal circuits as well as the load.
Operation will resume upon return of V
operating levels.
10
33395
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
0.15 µF
The gate drive outputs (GDH1, GDH2, etc.) supply the
The current capability of the charge pump is sufficient to
Charge reservoir capacitance is a function of the total
For example, for Q
Proper charge pump capacitance is required to maintain,
For example, for the above determination of C
By averaging these two values, the proper C
C
The device has internal temperature sensing circuitry
When the supply voltage (V
20
P1
and C
= 0.075 µF, lower limit; and
C
RES
P1
P2
GS
and C
=(0.0075
) and the allowable sag of the drive level
C
=
C
RES
2 x (14 V) x (0.2 V) - (0.2)
RES
20
P2
G
=
:
(60 nC) x (14 V)
< C
= 60 nC, V
G
2 x V
µ
) gate drive voltage level relative to
P1
F + 0.015
SAG
= C
GS
IGN
Q
). C
G
x V
P2
) exceeds the specified
0.15 µF
GS
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
x V
RES
<
SAG
10
µ
= 14 V, V
C
GS
F) ÷ 2 = 0.01
IGN
10
can be expressed by
RES
- V
to normal
= .015 µF, upper lim
SAG
2
= 0.15 µF
SAG
2
P
n
RES
value can
= 0.2 V:
µ
F
=
LOW VOLTAGE RESET FUNCTION
minimum voltage level or when the part is initially powered
up, this function will turn OFF and hold OFF the external
MOSFETs until the voltage increases above the minimum
voltage level required for normal operation.
CONTROL LOGIC
high-side drivers are enabled. The logic implements the Truth
Table found in the specification and monitors the M0, M1,
PWM, CL, OT, OV, LSE, and HSE pins. Note that the drivers
are enabled 3 µs after the PWM edge. During complimentary
chop mode the high-side and low-side drives are alternatively
enabled and disabled during the PWM cycle. To prevent
shoot-through current, the high-side drive turn-on is delayed
by t
Figure
overtemperature or overvoltage fault. A flip-flop keeps the
drive off until the following PWM cycle. This prevents erratic
operation during fault conditions. The current limit circuit also
uses a flip-flop for latching the drive off until the following
PWM cycle.
overvoltage faults to re-enable the gate drivers.
VGDH
reverse battery protection MOSFET. If reverse battery
protection is desired, V
an external MOSFET, and the drain of the MOSFET would
then deliver a "protected" supply voltage (V
phase array of external MOSFETs as well as the supply
voltage to the V
of the system battery), the V
the external protection MOSFET, and the MOSFET will
remain off and thus prevent reverse polarity from being
applied to the load and the VIGNP supply pin of the IC.
HIGH-SIDE GATE DRIVE CIRCUITS
drive voltage to the high-side external MOSFETs (HS1, HS2,
and HS3; see
supply the peak currents required to turn ON and hold ON the
high-side MOSFETs, as well as turn OFF the MOSFETs.
These gate drive circuits are powered from an internal charge
pump, and therefore compensate for voltage dropped across
the load that is reflected to the source-gate circuits of the
high-side MOSFETs.
LOW-SIDE GATE DRIVE CIRCUITS
to the low-side external MOSFETs (LS1, LS2, and LS3; see
When the logic supply voltage (V
The control logic block controls when the low-side and
Note that the drivers are disabled during an
Note PWM must be toggled after POR, Thermal Limit, or
The VGDH pin is used to provide a gate drive signal to a
In a reverse polarity event (e.g., an erroneous installation
Outputs GDH1, GDH2, and GDH3 provide the elevated
Outputs GDL1, GDL2, and GDL3 provide the drive voltage
D1
, and the low-side drive turn on is delayed by t
4, page 8).
Figure
IGNP
pin of the IC.
5, page 13). These gate drive outputs
Analog Integrated Circuit Device Data
IGN
would be applied to the source of
GDH
signal will not be supplied to
Freescale Semiconductor
DD
) drops below the
IGNP
) to the three
D2
(see