mc33389 Freescale Semiconductor, Inc, mc33389 Datasheet - Page 40

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mc33389

Manufacturer Part Number
mc33389
Description
System Basis Chip With Low Speed Fault Tolerant Can
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Table 41. VBSR1 VBSR0
Table 42. Interrupt Mask Control Register 1 (IMR1)
Table 43. Interrupt Mask Control Register 2 (IMR2)
appropriate bits in different SPI registers. For a faster read-out, these bits are merged in ISR1 and ISR2. A reset cannot be
completed for registers ISR1 and ISR2.
Table 44. Interrupt Source Register 1 (ISR1)
Table 45. Interrupt Source Register 2 (ISR2)
40
33389
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
To enable the appropriate interrupt, the mask bit has to be set to 1. To disable the interrupt the bit, it must be cleared to 0. After a power-ON
reset or RST = Low, the bits are cleared to 0. All interrupts are disabled. Explanation for the abbreviations:
HV = V
HT = High temperature on V1 or V2
MTPW = Medium temperature pre-warning on V1 or V2
BATU = Battery under voltage (BATFail)
BUSF = CAN bus failure
SPIE = SPI error
WU = Wake-up
V2SR: 1 = V2 ON, 0 = V2 OFF
V3SR: 1 = V3 over temperature, 0 = V3 no over temperature
VBSR1 is real time information. It cannot be reset. Bits V3SR, V2SR, and VBSR0 are latched and can be reset by a Read operation of the
register.
Address
Address
Address
Address
RESET
The next two registers (IMR1 and IMR2) mask the interrupt function.
RESET
RESET
The next two registers (ISR1 and ISR2) read the interrupt source. All bits in registers ISR1 and ISR2 are copies of the
RESET
IMR1
$01D
IMR2
$01E
$021
$022
ISR
ISR
BAT
VBSR1
High voltage
0
x
1
W
W
W
W
R
R
R
R
Bit 7
Bit 7
Bit 7
Bit 7
VBSR0
Bit 6
Bit 6
Bit 6
Bit 6
0
1
x
Bit 5
Bit 5
Bit 5
Bit 5
Bit 4
Bit 4
Bit 4
Bit 4
Bit 3
Bit 3
Bit 3
Bit 3
Under Voltage (BATFail)
HV
HV
0
0
Over Voltage (BATHigh)
No Failure on VBAT
Description
Analog Integrated Circuit Device Data
HTPW
BUSF
HTPW
BUSF
Bit 2
Bit 2
Bit 2
Bit 2
0
0
0
0
Freescale Semiconductor
MTPW
MTPW
SPIE
Bit 1
SPIE
Bit 1
Bit 1
Bit 1
0
0
0
0
BATU
BATU
Bit 0
Bit 0
WU
Bit 0
Bit 0
WU
0
0
0
0

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