dp83241 National Semiconductor Corporation, dp83241 Datasheet - Page 14

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dp83241

Manufacturer Part Number
dp83241
Description
Cdd Device Fddi Clock Distribution Device
Manufacturer
National Semiconductor Corporation
Datasheet
5 0 Detailed Information
5 2 2 CDD Device Driving Multiple PLAYER Devices
In a FDDI concentrator or dual attach station it may be
necessary for a single DP83241 Clock Distribution Device
(CDD device) to drive multiple DP83251 55 PLAYER devic-
es Since these PLAYER devices will be running synchro-
nously to each other they must have the same clocks The
easiest way to accomplish this is to have one CDD device
drive multiple PLAYER devices
We are only concerned with the ECL outputs being able to
drive multiple loads The conventional way of directly wiring
the one output to many inputs will not work If the ECL sig-
nals are split into multiple traces then reflections will result
which may ruin the signal’s integrity An appropriate method
where individual traces with a series resistor connected to
each load is used instead The series resistor should match
the line impedance and be placed as close to the CDD de-
vice as possible The resistor will act as a voltage divider
and cut the voltage level of the signal in half When this
modified signal reaches the input of the unterminated gate
reflections will cause the signal to double and the receiving
input will see the full voltage swing The reflection will then
travel back towards the CDD device but the series resist-
ance will stop this action An emitter pulldown resistor is
FIGURE 5-7 CDD Device Driving Four PLAYER Devices in Parallel
(Continued)
14
needed at the CDD device for this method of routing the
ECL signals The value of this resistor can be calculated
from the following equation
R
Where
R
Another method for sending the ECL signal to multiple play-
ers is to route the ECL signal as a bus line and have each
load connected to the bus The ECL bus line must be termi-
nated only at the very end with a matching impedance (e g
a 50X line will be terminated with a 50X load to V
It is preferred that the input pin be directly connected to the
bus and not have a signal tap connected to the bus Howev-
er if a tap off the bus is necessary the shortest possible tap
is recommended
e
e
(Max)
(Max)
R
Z
n
S
o
e
Largest emitter pulldown resistor
that can be used
Number of parallel lines being driven
Trace impedance
Series damping resistor
10 Z
o
n
b
R
S
TL F 10385 – 12
CC
b
2V)

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