mpc5632m Freescale Semiconductor, Inc, mpc5632m Datasheet - Page 27

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mpc5632m

Manufacturer Part Number
mpc5632m
Description
Mpc5634m Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
interfaces to the host processor (e200z335), eTPU, and internal buses to provide development support as per the IEEE-ISTO
5001-2003 standard. The development support provided includes program trace and run-time access to the MCUs internal
memory map and access to the Power Architecture and eTPU internal registers during halt. The Nexus interface also supports
a JTAG only mode using only the JTAG pins. MPC5634M in the production 144 LQFP supports a 3.3 V reduced (4-bit wide)
Auxiliary port. These Nexus port pins can also be used as 5 V I/O signals to increase usable I/O count of the device. When using
this Nexus port as IO, Nexus trace is still possible using VertiCal calibration. In the VertiCal calibration package, the full 12-bit
Auxiliary port is available.
The following features are implemented:
Freescale Semiconductor
5-pin JTAG port (JCOMP, TDI, TDO, TMS, and TCK)
— Always available in production package
— Supports both JTAG Boundary Scan and debug modes
— 3.3 V interface
— Supports Nexus class 1 features
— Supports Nexus class 3 read/write feature
9-pin Reduced Port interface in 144 LQFP production package
— Alternate function as IO
— 5 V (in GPIO or alternate function mode), 3.3 V (in Nexus mode) interface
— Auxiliary Output port
— Auxiliary input port
17-pin Full Port interface in VertiCal calibration package
— 3.3 V interface
— Auxiliary Output port
— Auxiliary input port
Host processor (e200) development support features
— IEEE-ISTO 5001-2003 standard class 2 compliant
— Program trace via branch trace messaging (BTM). Branch trace messaging displays program flow discontinuities
— Watchpoint trigger enable of program trace messaging
— Data Value Breakpoints (JTAG feature of the e200z335 core): allows CPU to be halted when the CPU writes a
– 1 MCKO (message clock out) pin
– 4 MDO (message data out) pins
– 2 MSEO (message start/end out) pins
– 1 EVTO (event out) pin
– 1 EVTI (event in) pin
– 1 MCKO (message clock out) pin
– 4 or 12 MDO (message data out) pins (8 extra full port pins shared with calibration bus)
– 2 MSEO (message start/end out) pins
– 1 EVTO (event out) pin
– 1 EVTI (event in) pin
(direct branches, indirect branches, exceptions, etc.), allowing the development tool to interpolate what transpires
between the discontinuities. Thus, static code may be traced.
specific value to a memory location
– 4 data value breakpoints
In the VertiCal package, the full Nexus Auxiliary port shares balls with the addresses of the
calibration bus. Therefore multiplexed address/data bus mode must be used for the
calibration bus when using full width Nexus trace in VertiCal assembly.
Preliminary—Subject to Change Without Notice
MPC5634M Microcontroller Data Sheet, Rev. 3
NOTE
Overview
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