mpc5644a Freescale Semiconductor, Inc, mpc5644a Datasheet - Page 10

• Manufacturer Part Number: mpc5644a
• Description: Mpc5644a Microcontroller Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

Overview
and 128- and 256-bit read data interfaces to flash memory. The module contains a prefetch controller which prefetches
sequential lines of data from the flash array into the buffers. Prefetch buffer hits allow no-wait responses.
The flash memory provides the following features:
1.2.9
The BAM (Boot Assist Module) is a block of read-only memory that is programmed once by Freescale and is identical for all
MPC5644A MCUs. The BAM program is executed every time the MCU is powered-on or reset in normal mode. The BAM
supports different modes of booting. They are:
The BAM also reads the reset configuration half word (RCHW) from internal flash memory and configures the MPC5644A
hardware accordingly. The BAM provides the following features:
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Supports a 64-bit data bus for instruction fetch, CPU loads and DMA access. Byte, halfword, word and doubleword
reads are supported. Only aligned word and doubleword writes are supported.
Fetch Accelerator
— Architected to optimize the performance of the flash
— Configurable read buffering and line prefetch support
— Four-entry 256-bit wide line read buffer
— Prefetch controller
Hardware and software configurable read and write access protections on a per-master basis
Interface to the flash array controller pipelined with a depth of one, allowing overlapped accesses to proceed in parallel
for interleaved or pipelined flash array designs
Configurable access timing usable in a wide range of system frequencies
Multiple-mapping support and mapping-based block access timing (0-31 additional cycles) usable for emulation of
other memory types
Software programmable block program/erase restriction control
Erase of selected block(s)
Read page size of 128 bits (four words)
ECC with single-bit correction, double-bit detection
Program page size of 128 bits (four words) to accelerate programming
ECC single-bit error corrections are visible to software
Minimum program size is two consecutive 32-bit words, aligned on a 0-modulo-8 byte address, due to ECC
Embedded hardware program and erase algorithm
Erase suspend, program suspend and erase-suspended program
Shadow information stored in non-volatile shadow block
Independent program/erase of the shadow block
Booting from internal flash memory
Serial boot loading (A program is downloaded into RAM via eSCI or the FlexCAN and then executed)
Booting from external memory on external bus
Sets up MMU to cover all resources and mapping of all physical addresses to logical addresses with minimum address
translation
Sets up MMU to allow user boot code to execute as either Power Architecture embedded category (default) or as
Freescale VLE code
Location and detection of user boot code
Automatic switch to serial boot mode if internal flash is blank or invalid
Supports user programmable 64-bit password protection for serial boot mode
Supports serial bootloading via FlexCAN bus and eSCI using Freescale protocol
BAM
Preliminary—Subject to Change Without Notice
MPC5644A Microcontroller Data Sheet, Rev. 4
Freescale Semiconductor