mpc855t Freescale Semiconductor, Inc, mpc855t Datasheet - Page 50

• Manufacturer Part Number: mpc855t
• Description: Mpc855t Powerquicc Integrated Communications Processor
• Manufacturer: Freescale Semiconductor, Inc

CPM Electrical Characteristics
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2
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Num
The ratio SYNCCLK/L1RCLK must be greater than 2.5/1.
These specs are valid for IDL mode only.
Where P = 1/CLKOUT. Thus, for a 25-MHz CLKO1 rate, P = 40 ns.
These strobes and TxD on the first bit of the frame become valid after L1CLK edge or L1SYNC, whichever comes later.
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85
86
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(FE = 0, CE = 0)
(FE = 1, CE = 1)
L1CLK edge to L1CLKO valid (DSC = 1)
L1RQ valid before falling edge of L1TSYNC
L1GR setup time
L1GR hold time
L1CLK edge to L1SYNC valid (FSD = 00) CNT = 0000, BYT = 0, DSC = 0)
L1ST(4–1)
L1RSYNC
L1RCLK
L1RCLK
(Output)
L1RXD
(Input)
(Input)
(Input)
(Input)
Figure 51. SI Receive Timing Diagram with Normal Clocking (DSC = 0)
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MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
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Characteristic
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Table 19. SI Timing (continued)
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74
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4
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BIT0
RFSD=1
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71a
42.00
42.00
1.00
Min
—
—
All Frequencies
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Freescale Semiconductor
30.00
Max
0.00
—
—
—
L1TCL
Unit
ns
ns
ns
ns
K