mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 195

• Manufacturer Part Number: mc68ec060
• Description: Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
• Manufacturer: Freescale Semiconductor, Inc

Bus Operation
To exit the LPSTOP mode, the processor CLK must be restarted for at least eight CLK and
two BCLK periods prior to asserting either the RSTI or generating an interrupt. It is impera-
tive before asserting RSTI or generating the interrupt no alternate master activity be done
until the processor begins exception processing for either the reset or interrupt. Additionally,
the following control signals must be pulled-up or negated during this time: BB, TRA, TA,
TEA, CLA, BGR, BG, SNOOP, AVEC, MDIS, CDIS, TCI, and TBI. The processor uses the
PSTx encoding of $18 to indicate exception processing.
7-40
Figure 7-31. Breakpoint Interrupt Acknowledge Bus Cycle Timing
MISCELLANEOUS
ATTRIBUTES
UPA1–UPA0
TM2–TM0
SIZ1–SIZ0
TT1–TT0
BS3–BS1
A31–A0
D31–D0
CIOUT
BCLK
R/W
BS0
SAS
TIP
TA
TS
ACKNOWLEDGE
C1
BREAKPOINT
M68060 USER’S MANUAL
BYTE
C2
C1
WRITE STACK
C2
MOTOROLA