mc68hc705j2 Freescale Semiconductor, Inc, mc68hc705j2 Datasheet - Page 62

Manufacturer Part Number

mc68hc705j2

Description

8-bit Microcontroller

Manufacturer

Freescale Semiconductor, Inc

Datasheet

1.MC68HC705J2.pdf (78 pages)

COPC — COP Clear

7.3 COP Timer

COPR — COP Register

RESET

MOTOROLA

7-4

This write-only bit resets the COP timer. Reading address $0FF0 returns the

EPROM data at that address.

Three counter stages at the end of the timer make up the computer operating

properly (COP) timer. (See Figure 7-1.) The COP timer is a software error

detection system that automatically times out and resets the MCU if not cleared

periodically by a program sequence. Writing a zero to bit 0 of the COP register

clears the COP timer and prevents a COP timer reset. (See Figure 7-4.)

Bit 7

—

Figure 7-4. COP Register (COPR)

—

TIMER

MC68HC05J1 Emulation Mode: $ 0 7 F 0

—

MC68HC705J2

COPC

Bit 0

$ 0 F F 0