mc68hc11e0fnr2 Freescale Semiconductor, Inc, mc68hc11e0fnr2 Datasheet - Page 132

• Manufacturer Part Number: mc68hc11e0fnr2
• Description: Hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timing Systems
input capture register pair inhibits a new capture transfer for one bus cycle. If a double-byte read
instruction, such as load double accumulator D (LDD), is used to read the captured value, coherency is
assured. When a new input capture occurs immediately after a high-order byte read, transfer is delayed
for an additional cycle but the value is not lost.
132
Register name: Timer Input Capture 1 Register (High)
Register name: Timer Input Capture 1 Register (Low)
Register name: Timer Input Capture 2 Register (High)
Register name: Timer Input Capture 2 Register (Low)
Register name: Timer Input Capture 3 Register (High)
Register name: Timer Input Capture 3 Register (Low)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Bit 15
Bit 15
Bit 15
Figure 9-4. Timer Input Capture 1 Register Pair (TIC1)
Figure 9-5. Timer Input Capture 2 Register Pair (TIC2)
Figure 9-6. Timer Input Capture 3 Register Pair (TIC3)
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
6
6
6
6
6
6
M68HC11E Family Data Sheet, Rev. 5.1
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
5
5
5
5
5
5
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Address: $1011
Address: $1013
Address: $1015
Address: $1010
Address: $1012
Address: $1014
4
4
4
4
4
4
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
3
3
3
3
3
3
Bit 10
Bit 10
Bit 10
Bit 2
Bit 2
Bit 2
2
2
2
2
2
2
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
1
1
1
1
1
1
Freescale Semiconductor
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0