mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 77

no-image

mc68hc05l25

Manufacturer Part Number
mc68hc05l25
Description
M68hc05 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
OSC and XOSC pins have options for feedback and damping resistor implementations. These options
are set through mask option and can be read through the MOSR register.
8.6.1 XOSC with FOSCE = 1
If the system clock is XOSC and FOSCE = 1, executing the STOP instruction will halt OSC, put the MCU
into a low-power mode, and clear the 6-bit POR counter. The 7-bit divider is not initialized. Exiting STOP
with external IRQ re-starts the oscillator; however, execution begins immediately using XOSC. When the
POR counter overflows, FTUP is set, signaling that OSC is stable and OSC can be used as the system
clock. The stabilization time will vary between 8064 and 8192 counts.
8.6.2 XOSC with FOSCE = 0
If XOSC is the system clock, clearing FOSCE will stop OSC and preset the 7-bit divider and 6-bit POR
counter to $0078. Execution will continue with XOSC and when FOSCE is set again, OSC will re-start.
When the POR counter overflows, FTUP is set, signaling that OSC is stable and OSC can be used as the
system clock. The stabilization time will be 8072 counts.
8.6.3 XOSC with FOSCE = 0 and STOP
If XOSC is the system clock and FOSCE is cleared, further power reduction can be achieved by executing
the STOP instruction. In this case, OSC is stopped, the 7-bit divider and 6-bit POR counter are preset to
$0078 (since FOSCE = 0), and execution is halted. Exiting STOP with external IRQ does not re-start the
OSC; however, execution begins immediately using XOSC. OSC can be re-started by setting FOSCE,
and when the POR counter overflows, FTUP be will set, signaling that OSC is stable and can be used as
the system clock. The stabilization time will be 8072 counts.
8.6.4 Unused XOSC
When XOSC is not used, the XOSC1 pin must be connected to the RESET pin to ensure proper
initialization of clock circuitry. The XOSC2 pin should be left unconnected. See
base by setting the TBCLK bit in TBCR1 to receive clock from fast oscillator OSC.
Freescale Semiconductor
When XOSC is not used, the XOSC1 input pin should be connected to
RESET pin to ensure proper initialization of clock circuitry.
RESET LOGIC
RESET
Figure 8-2. Unused XOSC1 Pin
FROM EXTERNAL RESET CIRCUIT
MC68HC05L25 Data Sheet, Rev. 3.1
OFF CHIP
NOTE
ON CHIP
XOSC1
XOSC
NO CONNECT
XOSC2
Figure
8-2. Configure time
XOSC On Line
77

Related parts for mc68hc05l25