mc68hc05bd3 Freescale Semiconductor, Inc, mc68hc05bd3 Datasheet - Page 49

• Manufacturer Part Number: mc68hc05bd3
• Description: Mc68hc05bd3d Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

7.2.1
When the bus is free, i.e., no master device is occupying the bus (both SCL and SDA lines are at
logic high), a master may initiate communication by sending a START signal. As shown in
Figure 7-2, a START signal is defined as a high to low transition of SDA while SCL is high. This
signal denotes the beginning of a new data transfer (each data transfer may contain several bytes
of data) and wakes up all slaves.
7.2.2
The first byte of data transfer immediately following the START signal is the slave address
transmitted by the master. This is a seven bits long calling address followed by a R/W bit. The R/W
bit dictates the slave of the desired direction of data transfer.
Only the slave with matched address will respond by sending back an acknowledge bit by pulling
the SDA low at the 9th clock; see Figure 7-2.
MC68HC05BD3
SDA
SDA
SCL
SCL
START signal
START signal
MSB
MSB
1
1
START Signal
Slave Address Transmission
1
1
0
0
Figure 7-2 M-Bus Transmission Signal Diagram
0
0
0
0
0
0
M-BUS SERIAL INTERFACE
1
1
LSB
LSB
1
1
Acknowledge bit
Acknowledge bit
repeated START signal
MSB
MSB
1
1
1
1
0
0
0
0
0
0
0
0
1
1
No acknowledge
No acknowledge
LSB
LSB
1
1
STOP signal
STOP signal
TPG
7-3
7