mc68hc05j1avp Freescale Semiconductor, Inc, mc68hc05j1avp Datasheet - Page 63

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mc68hc05j1avp

Manufacturer Part Number
mc68hc05j1avp
Description
M68hc05 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.4.2 Data Direction Register A
MC68HC05J1A — Rev. 3.0
MOTOROLA
NOTE:
Address:
The contents of data direction register A (DDRA) determine whether
each port A pin is an input or an output. Writing a logic 1 to a DDRA bit
enables the output buffer for the associated port A pin; a logic 0 disables
the output buffer. A reset initializes all DDRA bits to 0, configuring all port
A pins as inputs.
DDRA7–DDRA0 — Port A Data Direction Bits
Avoid glitches on port A pins by writing to the port A data register before
changing DDRA bits from logic 0 to logic 1.
Reset:
Read:
Write:
These read/write bits control port A data direction.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
DDRA7
$0004
Bit 7
0
Figure 7-2. Data Direction Register A (DDRA)
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Parallel Input/Output (I/O)
DDRA6
6
0
DDRA5
5
0
DDRA4
4
0
DDRA3
3
0
DDRA2
Parallel Input/Output (I/O)
2
0
DDRA1
1
0
Technical Data
DDRA0
Bit 0
Port A
0
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