mc68hc908jl16 Freescale Semiconductor, Inc, mc68hc908jl16 Datasheet - Page 142

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mc68hc908jl16

Manufacturer Part Number
mc68hc908jl16
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output (I/O) Ports
Table 10-2
10.2.3 Port A Input Pull-Up Enable Registers
The port A input pull-up enable registers contain a software configurable pull-up device for each of the
eight port A pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRAx be configured as input. Each pull-up device is automatically disabled when its
corresponding DDRAx bit is configured as output.
PTA6EN — Enable PTA6 on OSC2
PTAPUE[7:0] — Port A Input Pull-up Enable Bits
142
This read/write bit configures the OSC2 pin function when RC oscillator option is selected. This bit has
no effect for XTAL oscillator option.
These read/write bits are software programmable to enable pull-up devices on port A pins.
1 = OSC2 pin configured for PTA6 I/O, and has all the interrupt and pull-up functions
0 = OSC2 pin outputs the RC oscillator clock (RCCLK)
1 = Corresponding port A pin configured to have internal pull-up if its DDRA bit is set to 0
0 = Pull-up device is disconnected on the corresponding port A pin regardless of the state of its
DDRA bit
summarizes the operation of the port A pins.
PTAPUE Bit
1. X = Don’t care.
2. Pin pulled to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance.
Address: $000D
Address: $000E
Reset:
Reset:
Read:
Write:
Read:
Write:
X
1
0
Figure 10-6. PTA7 Input Pull-up Enable Register (PTA7PUE)
Figure 10-5. Port A Input Pull-up Enable Register (PTAPUE)
PTAPUE7
PTA6EN
Bit 7
Bit 7
0
0
DDRA Bit
DD
by internal pull-up.
0
0
1
= Unimplemented
PTAPUE6
6
0
6
0
Table 10-2. Port A Pin Functions
MC68HC908JL16 Data Sheet, Rev. 1.1
PTA Bit
X
X
X
PTAPUE5
(1)
5
0
5
0
I/O Pin Mode
Input, V
Input, Hi-Z
PTAPUE4
Output
4
0
4
0
DD
(2)
(4)
PTAPUE3
3
0
3
0
Read/Write
DDRA[7:0]
DDRA[7:0]
DDRA[7:0]
Accesses
to DDRA
PTAPUE2
2
0
2
0
PTA[7:0]
Read
Pin
Pin
PTAPUE1
Accesses
1
0
1
0
to PTA
PTA[7:0]
PTA[7:0]
Freescale Semiconductor
PTA[7:0]
PTAPUE0
Write
Bit 0
Bit 0
0
0
(3)
(3)

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