n80930hf Intel Corporation, n80930hf Datasheet - Page 20

• Manufacturer Part Number: n80930hf
• Description: Universal Serial Peripheral Controller
• Manufacturer: Intel Corporation

16
8 x 930H x UNIVERSAL SERIAL BUS PERIPHERAL CONTROLLER
5.0 ADDRESS MAP
FF:FFFFH
FF:4000H
FF:FFFFH
FF:0000H
FE:FFFFH
FE:0000H
FD:FFFFH
02:0000H
01:FFFFH
01:0000H
00:FFFFH
00:0420H
00:041FH
00:0080H
00:007FH
00:0020H
00:001FH
00:0000H
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Address)
Internal
18 address lines are bonded out (A15:0, A16:0, or A17:0 selected during chip configuration).
Data in this area is accessible by indirect addressing only.
Eight addresses at the top of all external memory maps are reserved for current and future device
Configuration Byte information.
Data is accessible by direct and indirect addressing.
Devices reset into internal or external starting locations depending on the state of EA# and configura-
tion byte information. See EA# signal description in Table 5. See also UCONFIG1:0 bit definitions in
the 8x930Ax, 8x930Hx Universal Serial Bus Micorcontroller User’s Manual.
This reserved area returns unspecified values. Software can execute a write to the reserved area, but
nothing is actually written.
Data is accessible by direct, indirect, and bit addressing.
The special function registers (SFRs) and the register file have separate internal address spaces.
Data is accessible by direct, indirect, and register addressing.
External Memory except the top eight bytes (FF:FFF8H – FF:FFFFH) which are
reserved for the configuration array.
External memory or on-chip nonvolatile memory (8 Kbytes FF:0000H –
FF:1FFFH, 16 Kbytes FF:0000H – FF:3FFFH).
External Memory
Reserved Addresses
External Memory
External Memory
On-chip RAM
On-chip RAM
Storage for R0–R7 of Register File
Table 12. 8 x 930H x Address Map
Description
ADVANCE INFORMATION
1, 2, 3
2, 4, 5
2
6
2
4
4
7
8, 9
Notes