z85c30 ZiLOG Semiconductor, z85c30 Datasheet - Page 6
z85c30
Manufacturer Part Number
z85c30
Description
Cmos Scc Serial Communications Controller
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z85C30.pdf
(71 pages)
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Other Features for Z85C30 Only
PS011705-0608
Some of the features listed below are available by default. Some of them (features with
*) are disabled on default to maintain compatibility with the existing Serial
Communications Controller (SCC) design, and “program to enable through WR7”:
•
•
•
•
New programmable WR7 (Write register 7 prime) to enable new features.
Improvements to support SDLC mode of synchronous communication:
–
–
–
–
–
–
–
–
–
–
Improved AC timing:
–
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–
Other features include:
–
–
–
Improve functionality to ease sending back-to-back frames.
Automatic SDLC opening Flag transmission.*
Automatic Tx Underrun/EOM Latch reset in SDLC mode.*
Automatic RTS deactivation.*
TxD pin forced High in SDLC NRZI mode after closing flag.*
Complete CRC reception.*
Improved response to Abort sequence in status FIFO.
Automatic Tx CRC generator preset/reset.
Extended Read for Write registers.*
Write data set-up timing improvement.
3 to 3.6 PCLK access recovery time.
Programmable DTR/REQ timing.*
Write data to falling edge of WR setup time requirement is now eliminated.
Reduced INT timing.
Extended Read function to read back the written value to the Write registers.*
Latching RRO during read.
RRO, bit D7 and RR10, bit D6 now has reset default value.
CMOS SCC Serial Communications Controller
Product Specification
Overview
2