z86e63 ZiLOG Semiconductor, z86e63 Datasheet - Page 31

• Manufacturer Part Number: z86e63
• Description: Cmos Z8 16k/32k Eprom Microcontroller
• Manufacturer: ZiLOG Semiconductor

PS014401-1001
Z86E63 Signal Description for EPROM Program/Read
User/Test Mode
Device Pin No.
User Modes
EPROM Read
Program
Program Verify
EPROM Protect
RAM Protect
a. I
b. V
c. V
d. V
e. V
f. XX = Irrelevant.
I
PP
CC
User Modes 4 and 5: EPROM and RAM Protect
To extend program security, EPROM and RAM protect cycles are provided for the
Z86E61/E63. Execution of the EPROM protect cycle prohibits proper execution of
the EPROM Read, EPROM Verify, and EPROM programming cycles. Execution
of the RAM protect cycle disables accesses to the upper 128 bytes of register
memory (excluding mode and configuration registers), but first the user’s program
must set bit 6 of the IMR (R251). Timing is shown in Figure 20 and Figure 21.
User Modes. Table 6 shows the programming voltage of each mode of the
Z86E61/E63.
The following signals are required to correctly program or read the Z86E63
device.
ADDR
The address must remain stable throughout the program read cycle.
DATA
The I/O data bus must be stable during programming (OE High, PGM Low, VPP
High). During read the data bus outputs data.
PP
H
IL
IH
= 12.0 ± 0.5 V
during programming = 40 mA maximum.
= 0 V
during programming, verify, or read = 40 mA maximum.
= 5 V.
= 12.0 ± 0.5 V.
Table 22. OTP Programming
P33
V
V
V
V
V
V
PP
IH
PP
PP
PP
PP
b
b
b
P32
EPM
V
X
X
V
X
H
H
c
Device Pins
P30
CE
V
V
V
V
V
IL
IL
IL
H
H
d
P31
OE
V
V
V
V
V
CMOS Z8 16K/32K EPROM Microcontroller
IL
IH
IL
IH
IH
a
e
P20
PGM
V
V
V
V
V
IH
IL
IH
IL
IL
ADDR V
Addr
Addr
Addr
XX
XX
f
f
5.0V
6.0V
6.0V
6.0V
6.0V
CC
Port 1
CNFG
Data
Out
In
Out
XX
XX
Z86E61/E63
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