ml675050 Oki Semiconductor, ml675050 Datasheet - Page 23

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ml675050

Manufacturer Part Number
ml675050
Description
Arm7tdmi Based Micro-controller For Ic Card Reader/writer
Manufacturer
Oki Semiconductor
Datasheet

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DISCRIPT OF FUNCTIONS (1/5)
OKI Semiconductor
CPU
Internal memory
External memory controller
Interrupt controller
- 32-bit RISC CPU (ARM7TDMI)
- Built-in 8-Kbyte unified cache
- Little-endian format
- Maximum operating frequency of 64 MHz
- Instruction structure: Enables mixed execution of high-density 32-bit long instructions and
- General-purpose registers: 32 bits x 31 registers
- Built-in barrel shifter (operations of ALU and barrel shift can be executed by a single instruction)
- Built-in debug function (JTAG interface)
- 16-Kbyte RAM: AHB connection
- 2-Kbyte battery backup RAM: AHB connection
- Setting of programmable access timing for each space
- ROM (FLASH) access function
- SRAM access function
- External I/O access function
- SDRAM access function
- LSI internal interrupt : 38 sources
- LSI external interrupt: 7 sources (with 1 source being FIQ)
- Seven levels of interrupt priorities can be set for each interrupt source.
the subset of them, i.e., 16-bit long instructions of high object efficiency.
Supports 1-bank x 16-Mbyte ROM space
Supports 16-bit devices only
Supports flash memories
Supports page access
1-bank x 16-Mbyte SRAM space
Supports 8- and 16-bit devices
Supports asynchronous SRAMs
2-bank I/O space
Supports 8- and 16-bit devices
OE/WE pulse and data OFF timing can be set
Maximum SDRAM capacity: 64 Mbytes (16-bit configuration)
Supports 16-bit devices
Supports CBR auto-refresh and self-refresh
Operates at the same clock as a 64 MHz CPU
FEDL675050-02
ML675050
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