ep1k30 Altera Corporation, ep1k30 Datasheet - Page 56

no-image

ep1k30

Manufacturer Part Number
ep1k30
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ep1k300QC208-3
Manufacturer:
ALTERA
0
Part Number:
ep1k300QC208-3N
Manufacturer:
ALTERA
0
Part Number:
ep1k30F1256-2N
Manufacturer:
ALTERA
Quantity:
5 510
Part Number:
ep1k30F1256-2N
Manufacturer:
LT
Quantity:
5 510
Part Number:
ep1k30F1256-2N
Manufacturer:
ALTERA
0
Part Number:
ep1k30F256
Manufacturer:
ALTERA
0
Part Number:
ep1k30F256-2N
Manufacturer:
ALTERA
0
Part Number:
ep1k30FC256
Quantity:
61
Part Number:
ep1k30FC256
Manufacturer:
ALTERA
Quantity:
852
Part Number:
ep1k30FC256
Manufacturer:
ALTERA
Quantity:
300
Part Number:
ep1k30FC256-1
Manufacturer:
ALTERA
Quantity:
85
Part Number:
ep1k30FC256-1
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
ACEX 1K Programmable Logic Device Family Data Sheet
56
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
EABDATA1
EABDATA2
EABWE1
EABWE2
EABRE1
EABRE2
EABCLK
EABCO
EABBYPASS
EABSU
EABH
EABCLR
AA
WP
RP
WDSU
WDH
WASU
WAH
RASU
RAH
WO
DD
EABOUT
EABCH
EABCL
Table 24. EAB Timing Microparameters
Symbol
Data or address delay to EAB for combinatorial input
Data or address delay to EAB for registered input
Write enable delay to EAB for combinatorial input
Write enable delay to EAB for registered input
Read enable delay to EAB for combinatorial input
Read enable delay to EAB for registered input
EAB register clock delay
EAB register clock-to-output delay
Bypass register delay
EAB register setup time before clock
EAB register hold time after clock
EAB register asynchronous clear time to output delay
Address access delay (including the read enable to output delay)
Write pulse width
Read pulse width
Data setup time before falling edge of write pulse
Data hold time after falling edge of write pulse
Address setup time before rising edge of write pulse
Address hold time after falling edge of write pulse
Address setup time before rising edge of read pulse
Address hold time after falling edge of read pulse
Write enable to data output valid delay
Data-in to data-out valid delay
Data-out delay
Clock high time
Clock low time
Note (1)
Parameter
Altera Corporation
(5)
(5)
(5)
(5)
Conditions

Related parts for ep1k30