dsp56602 Freescale Semiconductor, Inc, dsp56602 Datasheet

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dsp56602

Manufacturer Part Number
dsp56602
Description
Advance Information 16-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Advance Information
MOTOROLA
SEMICONDUCTOR PRODUCT INFORMATION
16-BIT DIGITAL SIGNAL PROCESSOR
The DSP56602 is a ROM-based 16-bit fixed-point CMOS Digital Signal Processor (DSP) designed
for low-power digital cellular subscriber applications. This 60 MHz chip is optimized for
processing-intensive, yet cost-effective, low power consumption digital mobile communications
applications. The DSP56602 is a member of the DSP56600 core family of DSPs, and is capable of
executing one instruction per clock cycle. The DSP56602 provides for customer-specifiable,
factory-programmed ROM. Application development can be performed using the
DSP56603EVM Evaluation Module or the DSP56603ADS Application Development System.
Figure 1 provides a block diagram of the DSP56602, showing the core structures and the
expansion areas. The DSP56600 core includes the Data Arithmetic Logic Unit (Data ALU),
Address Generation Unit (AGU), Program Controller, Program Patch Detector, Bus Interface
Unit, On-Chip Emulation (OnCE™) module, JTAG port, and a Phase Lock Loop (PLL)-based
clock generator. The expansion areas provide the program and data memories, as well as a
versatile set of on-chip peripherals and external ports.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
Rev. 1
© MOTOROLA, INC. 1997
EXTAL
PCAP
PINIT/NMI
Timer or
Program
Generator
Detector
Generation
Internal
GPIO
Switch
Triple
Patch
Address
Data
CLKOUT
Pins
Clock
Bus
PLL
Unit
RESET
Dedicated
GPIO
Pins
Controller
Program
Interrupt
3
Preliminary Information
Interface
HI08 or
GPIO
Host
Pins
Expansion Area
Figure 1 DSP56602 Block Diagram
16
MODA/IRQA
Peripheral
Controller
Program
Decode
Interface
or GPIO
Pins
SSI
6
YDB
XDB
PDB
MODB/IRQB
6
Generator
Program
Address
0.5 K
34 K
Program
Memory
ROM
RAM
DSP56600
16-bit
24
24
Core
MODC/IRQC
YAB
XAB
PAB
16
Two 40-bit Accumulators
4.25 K
6 K
Memory
40-bit Barrel Shifter
X Data
16 + 40
ROM
RAM
Data ALU
16
16
MODD/IRQD
40-bit MAC
4.25 K
Memory
8 K
Y Data
ROM
RAM
DSP56602
16
16
Order this document by:
Expansion
Interface
External
Manage-
Memory
OnCE™
Bus
Power
JTAG
Area
ment
DSP56602P/D
16
Address
24
Data
4
Control
5
DE
AA1096

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dsp56602 Summary of contents

Page 1

... This 60 MHz chip is optimized for processing-intensive, yet cost-effective, low power consumption digital mobile communications applications. The DSP56602 is a member of the DSP56600 core family of DSPs, and is capable of executing one instruction per clock cycle. The DSP56602 provides for customer-specifiable, factory-programmed ROM ...

Page 2

... data memory, organized as follows: – data ROM – 4. data RAM • Off-chip expansion for both program fetch and program data transfers • No additional logic needed for interface to external SRAM memories 2 Preliminary Information DSP56602 Product Brief MOTOROLA ...

Page 3

... Low power Wait for interrupt standby mode, and ultra low power Stop standby mode • Fully static, HCMOS design for operating frequencies from 60 MHz down (DC) • Special power management circuitry MOTOROLA Preliminary Information DSP56602 Product Brief DSP56602 Peripheral Circuits 3 ...

Page 4

... PRODUCT DOCUMENTATION The three manuals listed in Table 1 are required for a complete description of the DSP56602 and are necessary to design properly with the part. Documentation is available from a local Motorola distributor, a Motorola semiconductor sales office, a Motorola Literature Distribution Center, or through the Motorola DSP home page on the Internet (the source for the latest information). ...

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