dsp56f802ta80 Freescale Semiconductor, Inc, dsp56f802ta80 Datasheet - Page 3

• Manufacturer Part Number: dsp56f802ta80
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

56F802 General Description
Freescale Semiconductor
• Up to 30 MIPS operation at 60MHz core frequency
• Up to 40 MIPS operation at 80MHz core frequency
• DSP and MCU functionality in a unified,
• MCU-friendly instruction set supports both DSP and
• Hardware DO and REP loops
• 6-channel PWM Module with fault input
• Two 12-bit ADCs (1 x 2 channel, 1 x 3 channel)
• Serial Communications Interface (SCI)
• Two General Purpose Quad Timers with 2 external
C-efficient architecture
controller functions: MAC, bit manipulation unit, 14
addressing modes
outputs
*
includes TCS pin which is reserved for factory use and is tied to VSS
2
3
2
2
6
A/D1
A/D2
PWM Outputs
Quad Timer C
VREF
Quad Timer D
Fault A0
or GPIO
GPIO
SCI0
or
ADC
tion-Specific
Peripherals
Program Memory
1024 x 16 SRAM
1024 x 16 SRAM
Memory &
8188 x 16 Flash
2048 x 16 Flash
2048x 16 Flash
Applica-
Data Memory
Boot Flash
Watchdog
Controller
PWMA
Interrupt
COP/
RESET
Hardware Looping Unit
•
MODULE CONTROLS
ADDRESS BUS [8:0]
Program Controller
DATA BUS [15:0]
56F802 Technical Data, Rev. 9
56F802 Block Diagram
•
COP RESET
•
and
XAB1
XAB2
XDB2
CGDB
PAB
PDB
INTERRUPT
CONTROLS
5
JTAG/
OnCE
Port
Generation
•
Address
Unit
•
IPBus Bridge
16
• 8K × 16-bit words (16KB) Program Flash
• 1K × 16-bit words (2KB) Program RAM
• 2K × 16-bit words (4KB) Data Flash
• 1K × 16-bit words (2KB) Data RAM
• 2K × 16-bit words (4KB) Boot Flash
• JTAG/OnCE
• On-chip relaxation oscillator
• 4 shared GPIO
• 32-pin LQFP Package
•
(IPBB)
•
CONTROLS
VCAPC V
2
IPBB
Three 16-bit Input Registers
16 x 16 + 36 → 36-Bit MAC
Two 36-bit Accumulators
2
16
Digital Reg
•
DD
Data ALU
TM
Relaxation
Oscillator
3
V
port for debugging
Low Voltage
Supervisor
SS
* V
16-Bit
56800
Core
DDA
Analog Reg
.
Manipulation
V
SSA
Unit
Bit
PLL
3