adsp-21371kswz-2a Analog Devices, Inc., adsp-21371kswz-2a Datasheet - Page 28

no-image

adsp-21371kswz-2a

Manufacturer Part Number
adsp-21371kswz-2a
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet
ADSP-21371/ADSP-21375
SDRAM Interface Timing
Maximum SDRAM frequency for 1.2 V is 133 MHz SDCLK.
Table 26. SDRAM Interface Timing
1
2
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
t
For F
Command pins include: SDCAS, SDRAS, SDWE, MSx, SDA10, and SDCKE.
SSDAT
HSDAT
SDCLK
SDCLKH
SDCLKL
DCAD
HCAD
DSDAT
ENSDAT
CCLK
= 133 MHz (SDCLK ratio = 1:2).
DATA Setup Before SDCLK
DATA Hold After SDCLK
SDCLK Period
SDCLK Width High
SDCLK Width Low
Command, ADDR, Data Delay After SDCLK
Command, ADDR, Data Hold After SDCLK
Data Disable After SDCLK
Data Enable After SDCLK
DATA (IN)
DATA(OUT)
CMND ADDR
SDCLK
(OUT)
1
t
SSDAT
Figure 16. SDRAM Interface Timing for 133 MHz SDCLK
Rev. B | Page 28 of 52 | June 2008
2
t
2
DCAD
t
SDCLK
1.2 V, 266 MHz
Min
0.58
2.2
7.5
3
3
1.3
1.6
t
t
ENSDAT
HSDAT
t
t
DCAD
Max
5.3
5.3
HCAD
t
SDCLKL
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
SDCLKH
DSDAT
t
HCAD

Related parts for adsp-21371kswz-2a