epm7128bti100-7 Altera Corporation, epm7128bti100-7 Datasheet - Page 50
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epm7128bti100-7
Manufacturer Part Number
epm7128bti100-7
Description
Programmable Logic Device
Manufacturer
Altera Corporation
Datasheet
1.EPM7128BTI100-7.pdf
(66 pages)
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Part Number:
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MAX 7000B Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
(3)
(4)
50
PCI
Table 29. EPM7256B Selectable I/O Standard Timing Adder Delays (Part 2 of 2)
These values are specified under the Recommended Operating Conditions in
more information on switching waveforms.
These values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.1 ns to the PIA timing value.
Measured with a 16-bit loadable, enabled, up/down counter programmed into each LAB.
The t
running in low-power mode.
I/O Standard
LPA
parameter must be added to the t
Input to PIA
Input to global clock and clear
Input to fast input register
All outputs
Parameter
LAD
, t
LAC
, t
IC
, t
ACL
Min
, t
CPPW
-5
Max
0.0
0.0
0.0
0.0
, t
EN
, and t
Speed Grade
Min
Table 15 on page
SEXP
-7
Max
0.0
0.0
0.0
0.0
parameters for macrocells
Note (1)
Altera Corporation
Min
29. See
-10
Max
0.0
0.0
0.0
0.0
Figure 14
Unit
ns
ns
ns
ns
for