atf1508be ATMEL Corporation, atf1508be Datasheet - Page 7

• Manufacturer Part Number: atf1508be
• Description: High- Performance Cpld
• Manufacturer: ATMEL Corporation

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3663A–PLD–1/08
Product Terms and Select Mux
OR/XOR/CASCADE Logic
Flip-flop
Extra Feedback
I/O Control
Each ATF1508BE macrocell has five product terms. Each product term receives as its inputs all
signals from the switch matrix and regional bus.
The product term select multiplexer (PTMUX) allocates the five product terms as needed to the
macrocell logic gates and control signals. The PTMUX configuration is determined by the design
compiler, which selects the optimum macrocell configuration.
The ATF1508BE’s logic structure is designed to efficiently support all types of logic. Within a sin-
gle macrocell, all the product terms can be routed to the OR gate, creating a 5-input AND/OR
sum term. With the addition of the CASIN from neighboring macrocells, this can be expanded to
as many as 40 product terms with minimal additional delay.
The macrocell’s XOR gate allows efficient implementation of compare and arithmetic functions.
One input to the XOR comes from the OR sum term. The other XOR input can be a product term
or a fixed high or low level. For combinatorial outputs, the fixed level input allows polarity selec-
tion. For registered functions, the fixed levels allow DeMorgan minimization of product terms.
The ATF1508BE’s flip-flop has very flexible data and control functions. The data input can come
from either the XOR gate, from a separate product term or directly from the I/O pin. Selecting the
separate product term allows creation of a buried registered feedback within a combinatorial out-
put macrocell. (This feature is automatically implemented by the fitter software). In addition to D,
T, JK and SR operation, the flip-flop can also be configured as a flow-through latch. In this
mode, data passes through when the clock is high and is latched when the clock is low.
The clock itself can be any one of the Global CLK signals (GCK[0 : 2]) or an individual product
term. The flip-flop changes state on the clock’s rising edge. When the GCK signal is used as the
clock, one of the macrocell product terms can be selected as a clock enable. When the clock
enable function is active and the enable signal (product term) is low, all clock edges are ignored.
The flip-flop’s asynchronous reset signal (AR) can be either the Global Clear (GCLEAR), a prod-
uct term, or always off. AR can also be a logic OR of GCLEAR with a product term. The
asynchronous preset (AP) can be a product term or always off.
The ATF1508BE macrocell output can be selected as registered or combinatorial. The extra bur-
ied feedback signal can be either combinatorial or a registered signal regardless of whether the
output is combinatorial or registered. (This enhancement function is automatically implemented
by the fitter software.) Feedback of a buried combinatorial output allows the creation of a second
latch within a macrocell.
The output enable multiplexer (MOE) controls the output enable signal. Each I/O can be individ-
ually configured as an input, output or bi-directional pin. The output enable for each macrocell
can be selected from the true or complement of the two output enable pins, a subset of the I/O
pins, or a subset of the I/O macrocells. This selection is automatically done by the fitter software
when the I/O is configured as an input or bi-directional pin.
ATF1508BE
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