hi5905 Intersil Corporation, hi5905 Datasheet

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hi5905

Manufacturer Part Number
hi5905
Description
14-bit, 5 Msps A/d Converter
Manufacturer
Intersil Corporation
Datasheet
14-Bit, 5 MSPS A/D Converter
The HI5905 is a monolithic, 14-bit, 5 MSPS Analog-to-
Digital Converter fabricated in an advanced BiCMOS
process. It is designed for high speed, high resolution
applications where wide bandwidth, low power
consumption and excellent SINAD performance are
essential. With a 100MHz full power input bandwidth and
high frequency accuracy, the converter is ideal for many
types of communication systems employing digital IF
architectures.
The HI5905 is designed in a fully differential pipelined
architecture with a front end differential-in-differential-out
sample-and-hold amplifier (S/H). The HI5905 has excellent
dynamic performance while consuming 350mW power at 5
MSPS.
Data output latches are provided which present valid data to
the output bus with a low data latency of 4 clock cycles.
Ordering Information
Pinout
HI5905IN
HI5905EVAL2
NUMBER
PART
TEMP. RANGE
-40 to 85
(
o
25
C)
13
44 Ld MQFP
Low Frequency Eval Platform
PACKAGE
D
AV
A
GND1
Data Sheet
V
GND
V
V
NC
NC
NC
NC
NC
CC
IN+
DC
IN-
Q44.10x10
10
11
1
2
3
4
5
6
7
8
9
12 13 14 15 16 17
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
44 43 42 41 40
PKG.
NO.
HI5905 (MQFP)
TOP VIEW
39 38 37 36 35 34
18
Features
• Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 MSPS
• Low Power at 5 MSPS . . . . . . . . . . . . . . . . . . . . . .350mW
• Internal Sample and Hold
• Fully Differential Architecture
• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . 100MHz
• SINAD at 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . >70dB
• Low Data Latency
• Internal Voltage Reference
• TTL Compatible Clock Input
• CMOS Compatible Digital Data Outputs
Applications
• Digital Communication Systems
• Undersampling Digital IF
• Asymmetric Digital Subscriber Line (ADSL)
• Document Scanners
• Reference Literature
19
1-888-INTERSIL or 321-724-7143
- AN9214, Using Intersil High Speed A/D Converters
- AN9785, Using the Intersil HI5905 EVAL2 Evaluation
20
Board
21
22
January 1999
33
32
31
30
29
28
27
26
25
24
23
D3
D4
D5
D6
D7
NC
DV
D
D8
D9
NC
GND2
CC2
|
Copyright
File Number
©
Intersil Corporation 1999
HI5905
4259.3

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hi5905 Summary of contents

Page 1

... Data Sheet 14-Bit, 5 MSPS A/D Converter The HI5905 is a monolithic, 14-bit, 5 MSPS Analog-to- Digital Converter fabricated in an advanced BiCMOS process designed for high speed, high resolution applications where wide bandwidth, low power consumption and excellent SINAD performance are essential. With a 100MHz full power input bandwidth and ...

Page 2

... D9 (24) IN D10 (21) V (11) DC D11 (20 (10) IN D12 (19) (MSB) D13 (18) CLK (40) DV (41) CC1 AV (5) DV (43) CC CC1 AV (16) DV (27) CC CC2 0.1 F HI5905 CLOCK CLK V ROUT REF V RIN DV CC2 D13 (MSB) D12 D11 D10 (LSB) D GND2 ...

Page 3

... Analog I/O Pins Operating Conditions Temperature Range (HI5905IN -40 CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. ...

Page 4

... CC2 Power Dissipation Offset Error PSRR Gain Error PSRR, FSE NOTES: 2. Parameter guaranteed by design or characterization and not production tested. 3. With the clock off (clock low, hold mode). 16 HI5905 = +5.0V MSPS at 50% Duty Cycle, V CC1 CC2 Differential Analog Input, Unless Otherwise Specified (Continued) ...

Page 5

... STAGE 5TH STAGE DATA OUTPUT NOTES N-th sampling period N-th holding period. N ANALOG INPUT CLOCK 1.5V INPUT DATA OUTPUT 17 HI5905 ...

Page 6

... -THD (MSPS) S FIGURE 5. -2HD, -3HD AND -THD vs SAMPLE CLOCK FREQUENCY FIGURE 7. SUPPLY CURRENT vs SAMPLE CLOCK FREQUENCY 18 HI5905 FIGURE 4. SNR vs SAMPLE CLOCK FREQUENCY ...

Page 7

... HI5905 Detailed Description Theory of Operation The HI5905 is a 14-bit fully differential sampling pipeline A/D converter with digital error correction. Figure 8 depicts the circuit for the front end differential-in-differential-out sample- and-hold (S/H). The switches are controlled by an internal clock which is a non-overlapping two phase signal, , derived from the master clock ...

Page 8

... A fully differential connection (Figure 9) will give the best performance for the converter. Since the HI5905 is powered off a single +5V supply, the analog input must be biased so it lies within the analog input common mode voltage range of 1.0V to 4.0V. The perfor- mance of the ADC does not change signifi ...

Page 9

... The part should be mounted on a board that provides HI5905 separate low impedance connections for the analog and digital supplies and grounds. For best performance, the sup- plies to the HI5905 should be driven by clean, linear regu lated supplies. The board should also have good high frequency decoupling capacitors mounted as close as possi- ble to the converter ...

Page 10

... LSBs) is noted. Dynamic Performance Definitions Fast Fourier Transform (FFT) techniques are used to evaluate the dynamic performance of the HI5905. A low distortion sine wave is applied to the input coherently sampled, and the output is stored in RAM. The data is then transformed into the frequency domain with an FFT and analyzed to evaluate the dynamic performance of the A/D ...

Page 11

... For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 23 HI5905 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd ...

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