x9428wsi-2.7 Intersil Corporation, x9428wsi-2.7 Datasheet

no-image

x9428wsi-2.7

Manufacturer Part Number
x9428wsi-2.7
Description
Single Digitally Controlled Potentiometer Xdcp?
Manufacturer
Intersil Corporation
Datasheet
Single Digitally Controlled Potentiometer
(XDCP™)
FEATURES
• Solid state potentiometer
• 2-wire serial interface
• Register oriented format
• Power supplies
• Low power CMOS
• High reliability
• 4-bytes of nonvolatile memory
• 10kΩ resistor array
• Resolution: 64 taps each potentiometer
• 16 Ld SOIC, 14 Ld TSSOP packages
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
—Direct Read/Write/Transfer wiper position
—Store as many as four positions per
—V
—V+ = 2.7V to 5.5V
—V– = -2.7V to -5.5V
—Standby current < 1µA
—Ideal for battery operated applications
—Endurance–100,000 Data changes per bit per
—Register data retention–100 years
potentiometer
register
CC
= 2.7V to 5.5V
WP
V
V
®
SCL
SDA
CC
SS
V+
V–
A0
A2
A3
1
Data Sheet
Interface
Circuitry
Control
and
Data
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
1-888-INTERSIL or 1-888-468-3774
8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
R0 R1
R2 R3
DESCRIPTION
The
potentiometers (XDCP) on a monolithic CMOS
integrated microcircuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the 2-wire
bus interface. Each potentiometer has associated with
it a volatile Wiper Counter Register (WCR) and 4
nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the
resistor array through the switches. Power-up recalls
the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
Register
Counter
(WCR)
Wiper
X9428
All other trademarks mentioned are the property of their respective owners.
April 26, 2006
Low Noise/Low Power/2-Wire Bus
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
integrates
V
V
V
L
W
H
/R
/R
/R
L
H
a
W
digitally
X9428
FN8197.1
controlled

Related parts for x9428wsi-2.7

x9428wsi-2.7 Summary of contents

Page 1

Data Sheet Single Digitally Controlled Potentiometer (XDCP™) FEATURES • Solid state potentiometer • 2-wire serial interface • Register oriented format —Direct Read/Write/Transfer wiper position —Store as many as four positions per potentiometer • Power supplies —V = 2.7V to ...

Page 2

Ordering Information PART PART NUMBER MARKING X9428WS16* X9428WS X9428WS16Z* (Note) X9428WS Z X9428WS16I* X9428WS I X9428WS16IZ* (Note) X9428WS ZI X9428WV14* X9428 W X9428WV14Z* (Note) X9428 Z X9428WV14I* X9428 WI X9428WV14IZ* (Note) X9428 ZI X9428YS16* X9428YS X9428YS16Z* (Note) X9428YS Z X9428YS16I* ...

Page 3

Ordering Information (Continued) PART PART NUMBER MARKING X9428YS16I-2.7* X9428YS G X9428YS16IZ-2.7* X9428YS ZG (Note) X9428YV14-2.7* X9428 YF X9428YV14Z-2.7* X9428 YZF (Note) X9428YV14I-2.7* X9428 YG X9428YV14IZ-2.7* X9428 YZG (Note) *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal ...

Page 4

PIN DESCRIPTIONS Host Interface Pins Serial Clock (SCL) The SCL input is used to clock data into and out of the X9428. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. ...

Page 5

PRINCIPLES OF OPERATION The X9428 is a highly integrated microcircuit incorporating a resistor array and its associated registers and counters and the serial interface logic providing direct communication between the host and the XDCP potentiometers. Serial Interface The X9428 supports ...

Page 6

Acknowledge Polling The disabling of the inputs, during the internal nonvolatile write operation, can be used to take advantage of the typical 5ms EEPROM write cycle time. Once the stop condition is issued to indicate the end of the nonvolatile ...

Page 7

Figure 3. Two-Byte Instruction Sequence SCL SDA The Increment/Decrement command is different from the other commands. Once the command is issued and the X9428 has responded with an acknowledge, the master can ...

Page 8

Figure 4. Three-Byte Instruction Sequence SCL SDA Figure 5. Increment/Decrement Instruction Sequence SCL SDA Figure 6. ...

Page 9

Figure 7. Acknowledge Response from Receiver SCL from Master Data Output from Transmitter Data Output from Receiver START Figure 8. Detailed Potentiometer Block Diagram Serial Data Path From Interface Circuitry Register 0 Register 2 If WCR = 00[H] then V ...

Page 10

DETAILED OPERATION The potentiometer has a Wiper Counter Register and four Data Registers. A detailed discussion of the register organization and array operation follows. Wiper Counter Register The X9428 contains a Wiper Counter Register. The Wiper Counter Register can be ...

Page 11

Instruction Format Notes: (1) “MACK”/”SACK”: stands for the acknowledge sent by the master/slave. (2) “A3 ~ A0”: stands for the device addresses sent by the master. (3) “X”: indicates that “0” for testing purpose but physically it ...

Page 12

XFR Wiper Counter Register (WCR) to Data Register (DR) S device type device instruction S T identifier addresses Increment/Decrement ...

Page 13

ABSOLUTE MAXIMUM RATINGS Temperature under bias .................... -65°C to +135°C Storage temperature ......................... -65°C to +150°C Voltage on SDA, SCL or any address input with respect to V ......................... -1V to +7V SS Voltage on V+ (referenced ...

Page 14

D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.) Symbol Parameter I V supply current CC1 CC (nonvolatile write supply current CC2 CC (move wiper, write, read current (standby Input leakage ...

Page 15

A.C. TEST CONDITIONS I nput pulse levels V Input rise and fall times 10ns Input and output timing level V EQUIVALENT A.C. LOAD CIRCUIT 5V 1533Ω SDA Output 100pF AC TIMING (over recommended operating conditions) Symbol f Clock frequency SCL ...

Page 16

HIGH-VOLTAGE WRITE CYCLE TIMING Symbol t High-voltage write cycle time (store instructions) WR XDCP TIMING Symbol t Wiper response time after the third (last) power supply is stable WRPO t Wiper response time after instruction issued (all load instructions) WRL ...

Page 17

XDCP Timing (for All Load Instructions) SCL SDA XDCP Timing (for Increment/Decrement Instruction) SCL Wiper Register Address SDA Write Protect and Device Address Pins Timing SCL SDA WP A0, A2 ...

Page 18

APPLICATIONS INFORMATION Basic Configurations of Electronic Potentiometers V R Three terminal Potentiometer; Variable voltage divider Application Circuits Noninverting Amplifier – (1 Offset Voltage Adjustment R ...

Page 19

Application Circuits (continued) Attenuator – All -1/2 ≤ G ≤ +1/2 Inverting Amplifier – ...

Page 20

Thin Shrink Small Outline Plastic Packages (TSSOP) N INDEX 0.25(0.010) E AREA E1 - 0.05(0.002) SEATING PLANE - -C- α 0.10(0.004) 0.10(0.004 NOTES: 1. These package ...

Page 21

... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

Related keywords