wms7131 ETC-unknow, wms7131 Datasheet - Page 7

• Manufacturer Part Number: wms7131
• Description: Nonvolatile Digital Potentiometers
• Manufacturer: ETC-unknow

7. FUNCTIONAL DESCRIPTION
The WMS7130/1, a nonvolatile digitally programmable potentiometers with 32 taps, with or without
output buffer, is designed to operate as both a potentiometer or a variable resistor depending upon
the output configuration selected.
The chip can store up to one 8-bit word in a nonvolatile memory (NVMEM0) in order to set the tap
register value when the device is powered up.
The WMS7130/1 is controlled by a serial Up-Down (3-wire) interface that allows setting the tap
register value as well as storing data in the nonvolatile memory.
The WMS7130/1 can operate as either a rheostat or as a potentiometer (voltage divider). When in the
potentiometer configuration there are two possible modes. One is done using WMS7130 Winpot
device without the output buffer and the other mode is done with WMS7131 WinPot device with the
output buffer.
The WMS7130/1 acts as a two terminal resistive element in the rheostat configuration where one
terminal can be connected to either the end point pins of the resistor (V
terminal is the wiper (V
and the resistance can be adjusted by sending the corresponding tap register setting to the
WMS7130/1 or can also be set by loading a pre-set tap register value from nonvolatile memory
NVMEM0 upon power up.
In potentiometer configuration an input voltage is applied to either one of the end point pins (V
The voltage on the wiper pin will be proportional to the voltage difference between V
wiper setting. The resistance cannot be directly measured in this configuration.
The WMS7130/1 has one NVMEM position available for storing the potentiometer setting. The
NVMEM position can be directly written via the Up/Down interface. The potentiometer is loaded with
the value stored in the NVMEM0 on power up.
7.1. P
7.2. N
7.1.1. Rheostat Configuration
7.1.2. Potentiometer Configuration
OTENTIOMETER AND
ON
-V
OLATILE
M
W
EMORY
) pin. This configuration controls the resistance between the two terminals
R
HEOSTAT
(NVMEM)
M
ODES
- 7 -
Publication Release Date: April 21, 2005
A
and V
WMS7130/1
B
A
) and the other
B
and V
Revision 1.1
B
B
A
and the
or V
B
).
B