adv7403 Analog Devices, Inc., adv7403 Datasheet
adv7403
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adv7403 Summary of contents
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... HD and SMPTE standards. Graphic digitization is also supported by the ADV7403 capable of digitizing RGB graphics signals from VGA to SXGA rates and converting them into a digital RGB or YCrCb pixel output stream. SCART and overlay functionality are enabled by the ADV7403’ ...
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... ADV7403 TABLE OF CONTENTS Functional Block Diagram .............................................................. 3 Electrical Characteristics ................................................................. 4 Video Specifications ......................................................................... 6 Timing Characteristics..................................................................... 7 Analog Specifications....................................................................... 8 Absolute Maximum Ratings............................................................ 9 Stress Ratings ................................................................................ 9 Package Thermal Performance................................................... 9 Thermal Specifications ................................................................ 9 ESD Caution.................................................................................. 9 Pin Configuration and Function Descriptions........................... 10 Timing Diagrams............................................................................ 12 Detailed Functionality ................................................................... 13 Analog Front End ....................................................................... 13 SDP Pixel Data Output Modes ................................................. 13 REVISION HISTORY 9/05— ...
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... FUNCTIONAL BLOCK DIAGRAM OUTPUT FIFO AND FORMATTER Figure 1. Rev. SpA | Page ADV7403 ...
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... The min/max specifications are guaranteed over this range. 2 Temperature range −40°C to +85°C (0°C to 70°C temperature range for ADV7403KSTZ-140). MIN MAX 3 All specifications obtained using programming scripts with the following sequence included: Addr 0x0E - data 0x80, Addr 0x54 - data 0x00, Addr 0x0E - data 0x00. ...
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... All ADC linearity tests performed at input range of full scale − 12.5%, and at zero scale + 12.5%. 5 Max INL and DNL specifications obtained with part configured for component video input. 6 Specification for ADV7403KSTZ-140 only obtain specified V level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00, ...
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... Luma Brightness Accuracy Luma Contrast Accuracy 1 The min/max specifications are guaranteed over this range. 2 Temperature range −40°C to +85°C (0°C to 70°C temperature range for ADV7403KSTZ-140). MIN MAX 3 Guaranteed by characterization. 4 Nominal sync depth is 300 mV at 100% sync depth range. ...
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... Input Setup Time (Digital Input Port) Input Hold Time (Digital Input Port) 1 The min/max specifications are guaranteed over this range. 2 Temperature range −40°C to +85°C (0°C to 70°C temperature range for ADV7403KSTZ-140). MIN MAX 3 Guaranteed by characterization. 4 Maximum LLC1 frequency is 110 MHz for ADV7403BSTZ-110. ...
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... Large Clamp Sink Current Fine Clamp Source Current Fine Clamp Sink Current 1 The min/max specifications are guaranteed over this range. 2 Temperature range :−40°C to +85°C (0°C to 70°C temperature range for ADV7403KSTZ-140). MIN MAX 3 Guaranteed by characterization. 4 Except Pin 51 (FB). Test Conditions ...
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... IAVDD)+(DVDD × IDVDD)+ (DVDDIO × Max IDVDDIO) + (PVDD × IPVDD)). Symbol Test Conditions θ 4-layer PCB with solid ground plane JC θ 4-layer PCB with solid ground plane (still air) JA Rev. SpA | Page ADV7403 ) of 125°C. This J MAX × Max Typ Unit 7 °C/W 30 °C/W ...
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... P0 to P1, P10 to P11, 34, 33, 32, 31, 30, P20 to P21, P22 to 29, 24, 14, 13 P25, P26 to P29 2, 1, 100, 97, 96, P31 to P40 95, 88, 87, 84, 83 PIN 1 ADV7403 LQFP TOP VIEW (Not to Scale) Figure 2. Pin Configuration Type Function G Digital Ground. G Analog Ground. ...
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... MHz clock oscillator source to clock the ADV7403. O This pin should be connected to the 28.63636 MHz crystal or left connect if an external 3.3 V 28.63636 MHz clock oscillator source is used to clock the ADV7403. In crystal mode the crystal must be a fundamental crystal. O The recommend external loop filter must be connected to this ELPF pin. ...
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... ADV7403 TIMING DIAGRAMS SDA1/SDA2 SCLK1/SCLK2 LLC1 P0–P29, VS, HS, FIELD/DE DCLK_IN HS_IN CONTROL VS_IN INPUTS DE_IN P0–P1, P10–P11, P20–P21, P22–P29, P31–P32, P33–P40 Figure Timing LLC1 P0–P29, VS, HS, ...
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... DETAILED FUNCTIONALITY ANALOG FRONT END • Four 140 MHz (ADV7403KSTZ-140), Noise Shaped Video, 12-bit ADCs enable true 10-bit video decoder • 12 analog input channel mux enables multisource connection without the requirement of an external mux • Four current and voltage clamp control loops ensure any dc offsets are removed from the video signal • ...
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... Low power consumption: 1.8 V digital core, 3.3 V analog and digital I/O, low power power-down mode, and green PC mode • Industrial temperature range (−40°C to +85°C) (ADV7403BSTZ-110) • 140 MHz speed grade (ADV7403KST-140) • 100-lead × 14 mm, Pb-free LQFP Rev. SpA | Page ...
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... VCR. ADLLT enables the ADV7403 to track and decode poor quality video sources such as VCRs, noisy sources from tuner outputs, VCD players, and camcorders. The SDP also contains a chroma transient improvement (CTI) processor ...
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... VBI extraction of CGMS data is performed by the CP section of the ADV7403 for interlaced, progressive, and high definition scanning rates. The data extracted can be read back over the interface. For more detailed product information about the ADV7403, contact your local ADI sales office or email video.products@analog.com. Rev. SpA | Page ...
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... CHB/C[7:0] (for example, Cr/Cb[7:0]) OUT CHB/C[9:0] (for example, Cr/Cb[9:0]) OUT - CHB[7:0] (for example, B[7:0]) OUT CHB[9:0] (for example, B[9:0]) OUT CHB/C[7:0] (for example, Cr/Cb[7:0]) IN OUT - CHB/C[7:0] (for example, Cr/Cb[7:0]) OUT CHB/C[9:0] (for example, Cr/Cb[9:0]) OUT ADV7403 ...
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... ADV7403 Table 10. SDP, CP Pixel Input/Output Pin Map (P40 to P20) Processor, Format, and Mode 40 39 SDP Video out, 8-bit, - 4:2:2 SDP Video out, 10-bit, - 4:2:2 SDP Video out, 16-bit, - 4:2:2 SDP Video out, 20-bit, - 4:2:2 SDP Video out, 24-bit, - 4:4:4 SDP Video out, 30-bit, - 4:4:4 SM-SDP Digital tuner ...
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... RECOMMENDED EXTERNAL LOOP FILTER COMPONENTS The external loop filter components for the ELPF pin should be placed as close as possible to the respective pins. Figure 8 shows the recommended component values. PIN 46–ELPF 1.69kΩ 10nF 82nF PVDD = 1.8V Figure 8. ELPF Components Rev. SpA | Page ADV7403 ...
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... TYPICAL CONNECTION DIAGRAM Ω 56 Ω 75 Ω 75 Ω 75 Ω 75 Ω 75 Ω 75 Ω 75 Ω 75 Ω 75 DVDDIO 18 DVDDIO 6 DVDD 90 DVDD 39 DVDD 12 AVDD 63 PVDD 48 PVDD 47 Ω 2.7k Ω 2.7k Figure 9. ADV7403 Typical Connection Diagram Rev. SpA | Page DVSS 89 DVSS 40 DVSS 11 DVSSIO 17 DVSSIO 5 PVSS 50 PVSS 49 AVSS 60 AVSS 66 TEST0 70 ...
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... The ADV7403 is a Pb-free, environmentally friendly product manufactured using the most up-to-date materials and processes. The coating on the leads of each device is 100% pure Sn electroplate. The device is suitable for Pb-free applications, and is able to withstand surface-mount soldering 255°C (±5°C). In addition backward-compatible with conventional SnPb soldering processes. This means that the electroplated Sn coating can be soldered with SnPb solder pastes at conventional reflow temperatures of 220° ...
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... ADV7403 NOTES Rev. SpA | Page ...
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... NOTES Rev. SpA | Page ADV7403 ...
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... ADV7403 NOTES 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05431– ...