adv7180 Analog Devices, Inc., adv7180 Datasheet - Page 77

• Manufacturer Part Number: adv7180
• Description: 10-bit, 4 X Oversampling Sdtv Video Decoder
• Manufacturer: Analog Devices, Inc.

Address
Dec Hex Register Name
154 9A CCAP 2
155 9B
156 9C
157 9D Letterbox 3
178 B2
195 C3
196 C4
220 DC Letterbox Control 1
221 DD Letterbox Control 2
222 DE ST Noise Readback 1
223 DF ST Noise Readback 2
224 E0
225 E1
226 E2
227 E3
228 E4
229 E5
230 E6
231 E7
232 E8
233 E9
234 EA
235 EB
236 EC
243 F3
244 F4
248 F8
249 F9
251 FB
252 FC
1
2
This feature applies to the ADV7180BCPZ 40-lead only because VS or field are shared on a single pin (Pin 37).
This feature applies to the ADV7180BSTZ 64-lead only.
Letterbox 1
Letterbox 2
CRC
ADC Switch 1
ADC Switch 2
Reserved
SD Offset Cb
SD Offset Cr
SD Saturation Cb
SD Saturation Cr
NTSC V Bit Begin
NTSC V Bit End
NTSC F Bit Toggle
PAL V Bit Begin
PAL V Bit End
PAL F Bit Toggle
Vblank Control 1
Vblank Control 2
AFE_CONTROL 1
Drive Strength
IF Comp Control
VS Mode Control
Peaking Control
Coring Threshold
RW 7
R
R
R
R
W
RW MUX1[3]
RW MAN_MUX_EN
RW
RW LB_SL[3]
R
R
RW SD_OFF_CB[7] SD_OFF_CB[6] SD_OFF_CB[5] SD_OFF_CB[4] SD_OFF_CB[3] SD_OFF_CB[2]
RW SD_OFF_CR[7] SD_OFF_CR[6] SD_OFF_CR[5] SD_OFF_CR[4] SD_OFF_CR[3] SD_OFF_CR[2]
RW SD_SAT_CB[7] SD_SAT_CB[6] SD_SAT_CB[5] SD_SAT_CB[4] SD_SAT_CB[3] SD_SAT_CB[2]
RW SD_SAT_CR[7] SD_SAT_CR[6] SD_SAT_CR[5] SD_SAT_CR[4] SD_SAT_CR[3] SD_SAT_CR[2]
RW NVBEGDELO
RW NVENDDELO
RW NFTOGDELO
RW PVBEGDELO
RW PVENDDELO
RW PFTOGDELO
RW NVBIOLCM[1]
RW NVBIOCCM[1]
RW
RW
RW
RW
RW PEAKING_
RW DNR_TH2[7]
CCAP2[7]
LB_LCT[7]
LB_LCM[7]
LB_LCB[7]
ST_NOISE[7]
GAIN[7]
6
CCAP2[6]
LB_LCT[6]
LB_LCM[6]
LB_LCB[6]
MUX1[2]
LB_SL.2
ST_NOISE.6
NVBEGDELE
NVENDDELE
NFTOGDELE
PVBEGDELE
PVENDDELE
PFTOGDELE
NVBIOLCM[0]
NVBIOCCM[0]
PEAKING_
GAIN[6]
DNR_TH2[6]
NVBEGSIGN
NVENDSIGN
NFTOGSIGN
NVBIELCM[1] NVBIELCM[0]
DR_STR[1]
5
CCAP2[5]
LB_LCT[5]
LB_LCM[5]
LB_LCB[5]
MUX1[1]
LB_SL[1]
ST_NOISE[5]
PVBEGSIGN
PVENDSIGN
PFTOGSIGN
NVBIECCM[1] NVBIECCM[0]
PEAKING_
GAIN[5]
DNR_TH2[5]
Rev. B | Page 77 of 112
LB_LCT[4]
LB_LCM[4]
NVBEG[4]
NVEND[4]
NFTOG[4]
DR_STR[0]
4
CCAP2[4]
LB_LCB[4]
MUX1[0]
LB_TH[4]
LB_SL[0]
ST_NOISE[4]
PVBEG[4]
PVEND[4]
PFTOG[4]
PEAKING_
GAIN[4]
DNR_TH2[4]
3
CCAP2[3]
LB_LCT[3]
LB_LCM[3]
LB_LCB[3]
MUX0[3]
MUX2[3]
LB_TH[3]
LB_EL[3]
ST_NOISE_VLD ST_NOISE[10]
ST_NOISE[3]
NVBEG[3]
NVEND[3]
NFTOG[3]
PVBEG[3]
PVEND[3]
PFTOG[3]
PVBIOLCM.1
PVBIOCCM.1
AA_FILT_
MAN_OVR
DR_STR_C[1]
VS_COAST_
MODE[1]
PEAKING_
GAIN[3]
DNR_TH2[3]
2
CCAP2[2]
LB_LCT[2]
LB_LCM[2]
LB_LCB[2]
CRC_ENABLE
MUX0[2]
MUX2[2]
LB_TH[2]
LB_EL[2]
ST_NOISE[2]
NVBEG[2]
NVEND[2]
NFTOG[2]
PVBEG[2]
PVEND[2]
PFTOG[2]
PVBIOLCM.0
PVBIOCCM.0
AA_FILT_EN[2]
DR_STR_C[0]
IFFILTSEL[2]
VS_COAST_
MODE[0]
PEAKING_
GAIN[2]
DNR_TH2[2]
NFTOG[1]
1
CCAP2[1]
LB_LCT[1]
LB_LCM[1]
LB_LCB[1]
MUX0[1]
MUX2[1]
LB_TH[1]
LB_EL[1]
ST_NOISE[9]
ST_NOISE[1]
SD_OFF_CB[1] SD_OFF_CB[0]
SD_OFF_CR[1] SD_OFF_CR[0]
SD_SAT_CB[1] SD_SAT_CB[0]
SD_SAT_CR[1] SD_SAT_CR[0]
NVBEG[1]
NVEND[1]
PVBEG[1]
PVEND[1]
PFTOG[1]
PVBIELCM.1
PVBIECCM.1
AA_FILT_EN[1] AA_FILT_EN[0]
DR_STR_S[1]
IFFILTSEL[1]
EXTEND_VS_
MIN_FREQ
PEAKING_
GAIN[1]
DNR_TH2[1]
0
CCAP2[0]
LB_LCT[0]
LB_LCM[0]
LB_LCB[0]
MUX0[0]
MUX2[0]
LB_TH[0]
LB_EL[0]
ST_NOISE[8]
ST_NOISE[0]
NVBEG[0]
NVEND[0]
NFTOG[0]
PVBEG[0]
PVEND[0]
PFTOG[0]
PVBIELCM.0
PVBIECCM.0
DR_STR_S[0]
IFFILTSEL[0]
EXTEND_VS_
MAX_FREQ
PEAKING_
GAIN[0]
DNR_TH2[0]
ADV7180
Reset
Value
–
–
–
–
00011100 1C
xxxxxxxx 00
0xxxxxxx 00
10101100 AC
01001100 4C
–
–
10000000 80
10000000 80
10000000 80
10000000 80
00100101 25
00000100 04
01100011 63
01100101 65
00010100 14
01100011 63
01010101 55
01010101 55
00000000 00
xx010101 15
00000000 00
00000011 03
01000000 40
00000100 04
(Hex)
–
–
–
–
–
–