lm8322 National Semiconductor Corporation, lm8322 Datasheet - Page 29

• Manufacturer Part Number: lm8322
• Description: Mobile I/o Companion Supporting Key-scan, I/o Expansion, Pwm, And Access.bus Host Interface
• Manufacturer: National Semiconductor Corporation

Please note: The data bytes which follow the command can
be reads (toward the host) or writes (toward the LM8322). In
the case of the READ_FIFO and RPT_READ_FIFO com-
mands, the number of data bytes is variable, with the last
transaction indicated by returning a negative acknowledge-
ment (NACK).
17.2 WRITE_CFG COMMAND
The WRITE_CFG command consists of a command byte
(0x81) and a data byte from the host. The data byte is loaded
Please note: The WRITE_CFG COMMAND defines basic
hardware operation characteristics. It should be placed at the
beginning of the initialization sequence driven from the host
device after power on. It is not recommended to change the
configuration during run time. Anytime this command is used,
7
1
7
1
MUX2SEL
MUX1SEL
MUX2EN
MUX1EN
IRQPST
6
0
Bit
6
0
5
0
5
0
4
0
4
0
Value
3
0
3
0
0
1
0
1
0
1
0
1
0
1
2
0
2
0
IRQ is an open-drain output.
IRQ is a push-pull output.
MUX2_OUT output disabled.
MUX2_OUT output enabled. This overrides any other function available on this pin.
If the MUX2 EN bit is 1, the MUX2_IN1 input drives the MUX2_OUT output.
If the MUX2 EN bit is 1, the MUX2_IN2 input drives the MUX2_OUT output.
MUX1_OUT output disabled.
MUX1_OUT output enabled. This overrides any other function available on this pin.
If the MUX1 EN bit is 1, the MUX1_IN1 input drives the MUX1_OUT output.
If the MUX1 EN bit is 1, the MUX1_IN2 input drives the MUX1_OUT output.
1
0
1
0
0
1
0
0
IRQPST
7
7
6
MANUFACTURER
5
6
0
29
4
5
0
17.1 READ_ID COMMAND
The READ_ID command consists of a command byte (0x80)
from the host and two data bytes from the LM8322.
The first data byte returns the manufacturer code, and the
second byte returns the device revision level.
3
into the hardware configuration register. The default state of
this register is 0x80.
it initializes important operating characteristics such as the
the GPIO port. This means that the GPIO pins must be re-
established
WRITE_PORT_STATE commands in this case.
2
4
0
Description
1
MUX2EN
0
3
7
via
MUX2SEL MUX1EN
6
2
5
WRITE_PORT_SEL
REVISION
4
3
1
2
MUX1SEL
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1
0
0
and