pca9655e ON Semiconductor, pca9655e Datasheet
pca9655e
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pca9655e Summary of contents
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... Remote 16-bit I/O Expander 2 for I C Bus with Interrupt The PCA9655E provides 16 bits of General Purpose parallel Input / Output (GPIO) expansion through the I The PCA9655E consists of two 8−bit Configuration (Input or Output selection); Input, Output and Polarity Inversion (active−HIGH or active−LOW operation) registers. At power on, all I/Os default to inputs ...
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... BLOCK DIAGRAM PCA9655E AD0 AD1 AD2 SCL INPUT FILTER SDA V DD POWER−ON RESET V SS Remark: All I/Os are set as inputs at reset. Figure 1. Block Diagram data from shift register configuration register data from D Q shift register FF write D configuration CK Q pulse FF write pulse ...
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... AD0 2 17 IO1_7 3 16 IO1_6 PCA9655E 4 15 IO1_5 5 14 IO1_4 6 13 IO1_3 Transparent top view Figure 4. QFN24 Description Interrupt Output (active−LOW) Address Input 1 Address Input 2 Port 0 I/O 0 Port 0 I/O 1 Port 0 I/O 2 Port 0 I/O 3 Port 0 I/O 4 ...
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Table 2. MAXIMUM RATINGS Symbol V DC Supply Voltage DD V Input / Output Pin Voltage I/O I Input Current I I Output Current Supply Current Ground Current GND P Total Power Dissipation TOT ...
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Table 4. DC ELECTRICAL CHARACTERISTICS Symbol Parameter SUPPLIES I Standby Current STB V Power−On Reset Voltage POR (Note 5) INPUT SCL; Input / Output SDA V High−Level Input Voltage IH V Low−Level Input Voltage IL I Low−Level Output Current OL ...
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Table 5. AC ELECTRICAL CHARACTERISTICS Symbol Parameter f SCL Clock Frequency SCL t Bus−Free Time between a STOP and START BUF Condition t Hold Time (Repeated) START Condition HD:STA t Setup Time for a Repeated START Condition SU:STA t Setup ...
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... Before the bus master can access a slave device, it must send the address of the slave it is accessing and the operation it wants to perform (read or write) following a START condition. The slave address of the PCA9655E is shown in Figure 5. Address pins AD2, AD1, and AD0 choose slave addresses. To conserve power, no internal pull−up resistors are provided on AD2, AD1, and AD0 ...
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... Table 6. PCA9655E ADDRESS MAP Address Input AD2 AD1 AD0 SCL SCL GND SCL SCL VDD SCL SDA GND SCL SDA VDD SDA SCL GND SDA SCL VDD SDA SDA GND SDA SDA VDD SCL SCL SCL SCL SCL SDA SCL SDA ...
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Command Byte During a write transmission, the address byte is followed by the command byte. The command byte determines which of the following registers will be written or read. Table 7. COMMAND BYTE COMMAND 0 Input Port 0 1 Input ...
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... Default 1 1 Power−on Reset Upon application of power, an internal Power−On Reset (POR) holds the PCA9655E in a reset condition while V is ramping up. When V has reached V DD condition is released and the PCA9655E registers and SMBus state machine will initialize to their default states. ...
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... Figure 7. Write to Configuration Registers by the PCA9655E (see Figures 8, 9 and 10). Data is clocked into the register on the falling edge of the acknowledge clock pulse. After the first byte is read, additional bytes may be read but with data alternately coming from each register in the pair ...
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SDA START condition R/W acknowledge from slave slave address (cont (repeated) R/W START condition acknowledge from slave Remark: Transfer can ...
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SCL R/W slave address SDA S A6 A5A4 START condition acknowledge from slave t h(D) read from port 0 data into port 0 DATA ...
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... Data transfer may only be initiated when the bus is not busy. APPLICATION INFORMATION PCA9655E SCL IO0_0 SDA IO0_1 IO0_2 INT IO0_3 IO0_4 ...
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SDA SCL START and STOP Conditions Both data and clock lines remain HIGH when the bus is not busy. A START condition (S) occurs when there is a HIGH−to−LOW transition of the data line while the clock is SDA SCL ...
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SCL from master SDA t BUF t LOW SCL t HD;STA P S Figure 16. Definition of Timing on the I PULSE GENERATOR R = load resistor load capacitance ...
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... ORDERING INFORMATION Device PCA9655EDWR2G PCA9655EDTR2G PCA9655EMTTXG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Package SOIC−24 (Pb−Free) TSSOP−24 (Pb−Free) QFN24 (Pb−Free) http://onsemi.com 17 † Shipping 1000 / Tape & ...
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D 24X 0.010 (0.25 −T− SEATING G PLANE 22X PACKAGE DIMENSIONS SOIC−24 CASE 751E−04 ISSUE E 13 −B− P 12X 0.010 (0.25 ...
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L PIN 1 IDENT. 1 0.15 (0.006 0.10 (0.004) −T− SEATING D PLANE K K1 Ç Ç Ç Ç Ç Ç É É É J1 Ç Ç Ç ...
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... AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.70 0.80 A1 0.00 0.05 A3 0.20 REF b 0.20 0.30 D 4.00 BSC D2 2.00 2.20 E 4.00 BSC E2 2.00 2.20 e 0.50 BSC K 0.20 −−− L 0.30 0.50 L1 0.00 0.15 MOUNTING FOOTPRINT* 4.30 24X 2.26 0.63 1 4.30 24X 0.30 0.50 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative PCA9655E/D ...